/* * File: D:\test\tdm32x16_20250827_test_output\tdm32x16_20250827_test_output\tdm32x16_IC_1_PARAM.h * * Created: Monday, September 1, 2025 5:01:47 PM * Description: tdm32x16:IC 1 parameter RAM definitions. * * This software is distributed in the hope that it will be useful, * but is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR * CONDITIONS OF ANY KIND, without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. * * This software may only be used to program products purchased from * Analog Devices for incorporation by you into audio products that * are intended for resale to audio product end users. This software * may not be distributed whole or in any part to third parties. * * Copyright ©2025 Analog Devices, Inc. All rights reserved. */ #ifndef __TDM32X16_IC_1_PARAM_H__ #define __TDM32X16_IC_1_PARAM_H__ /* Module Level2_4 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004TCONST_ADDR 6231 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004HOLD_ADDR 6232 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004DECAY_ADDR 6233 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004X_ADDR 6241 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004XLO_ADDR 6242 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004LINX_ADDR 6243 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004LINXLO_ADDR 6244 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_4_ALG0_SINGLEBANDLEVELDETS3004LINXLO_MEMORYPAGE 0 /* Module Level1_27 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_27_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_27_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043TCONST_ADDR 388 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043HOLD_ADDR 389 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043DECAY_ADDR 390 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043X_ADDR 398 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043XLO_ADDR 399 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043LINX_ADDR 400 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043LINXLO_ADDR 401 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_27_ALG0_SINGLEBANDLEVELDETS30043LINXLO_MEMORYPAGE 0 /* Module Level1_24 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_24_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_24_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039TCONST_ADDR 346 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039HOLD_ADDR 347 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039DECAY_ADDR 348 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039X_ADDR 356 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039XLO_ADDR 357 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039LINX_ADDR 358 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039LINXLO_ADDR 359 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_24_ALG0_SINGLEBANDLEVELDETS30039LINXLO_MEMORYPAGE 0 /* Module Level1_4 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_4_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_4_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019TCONST_ADDR 66 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019HOLD_ADDR 67 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019DECAY_ADDR 68 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019X_ADDR 76 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019XLO_ADDR 77 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019LINX_ADDR 78 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019LINXLO_ADDR 79 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_4_ALG0_SINGLEBANDLEVELDETS30019LINXLO_MEMORYPAGE 0 /* Module Level2_1 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001TCONST_ADDR 6189 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001HOLD_ADDR 6190 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001DECAY_ADDR 6191 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001X_ADDR 6199 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001XLO_ADDR 6200 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001LINX_ADDR 6201 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001LINXLO_ADDR 6202 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_1_ALG0_SINGLEBANDLEVELDETS3001LINXLO_MEMORYPAGE 0 /* Module Level2_6 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006TCONST_ADDR 6259 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006HOLD_ADDR 6260 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006DECAY_ADDR 6261 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006X_ADDR 6269 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006XLO_ADDR 6270 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006LINX_ADDR 6271 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006LINXLO_ADDR 6272 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_6_ALG0_SINGLEBANDLEVELDETS3006LINXLO_MEMORYPAGE 0 /* Module Level1_9 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_9_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_9_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024TCONST_ADDR 136 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024HOLD_ADDR 137 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024DECAY_ADDR 138 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024X_ADDR 146 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024XLO_ADDR 147 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024LINX_ADDR 148 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024LINXLO_ADDR 149 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_9_ALG0_SINGLEBANDLEVELDETS30024LINXLO_MEMORYPAGE 0 /* Module Level1_2 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_2_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_2_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017TCONST_ADDR 38 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017HOLD_ADDR 39 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017DECAY_ADDR 40 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017X_ADDR 48 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017XLO_ADDR 49 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017LINX_ADDR 50 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017LINXLO_ADDR 51 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_2_ALG0_SINGLEBANDLEVELDETS30017LINXLO_MEMORYPAGE 0 /* Module Level2_12 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012TCONST_ADDR 6343 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012HOLD_ADDR 6344 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012DECAY_ADDR 6345 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012X_ADDR 6353 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012XLO_ADDR 6354 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012LINX_ADDR 6355 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012LINXLO_ADDR 6356 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_12_ALG0_SINGLEBANDLEVELDETS30012LINXLO_MEMORYPAGE 0 /* Module Level2_13 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013TCONST_ADDR 6357 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013HOLD_ADDR 6358 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013DECAY_ADDR 6359 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013X_ADDR 6367 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013XLO_ADDR 6368 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013LINX_ADDR 6369 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013LINXLO_ADDR 6370 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_13_ALG0_SINGLEBANDLEVELDETS30013LINXLO_MEMORYPAGE 0 /* Module Level2_10 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010TCONST_ADDR 6315 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010HOLD_ADDR 6316 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010DECAY_ADDR 6317 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010X_ADDR 6325 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010XLO_ADDR 6326 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010LINX_ADDR 6327 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010LINXLO_ADDR 6328 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_10_ALG0_SINGLEBANDLEVELDETS30010LINXLO_MEMORYPAGE 0 /* Module Level2_11 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011TCONST_ADDR 6329 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011HOLD_ADDR 6330 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011DECAY_ADDR 6331 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011X_ADDR 6339 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011XLO_ADDR 6340 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011LINX_ADDR 6341 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011LINXLO_ADDR 6342 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_11_ALG0_SINGLEBANDLEVELDETS30011LINXLO_MEMORYPAGE 0 /* Module Level2_16 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016TCONST_ADDR 6399 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016HOLD_ADDR 6400 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016DECAY_ADDR 6401 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016X_ADDR 6409 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016XLO_ADDR 6410 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016LINX_ADDR 6411 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016LINXLO_ADDR 6412 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_16_ALG0_SINGLEBANDLEVELDETS30016LINXLO_MEMORYPAGE 0 /* Module Level2_15 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015TCONST_ADDR 6385 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015HOLD_ADDR 6386 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015DECAY_ADDR 6387 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015X_ADDR 6395 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015XLO_ADDR 6396 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015LINX_ADDR 6397 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015LINXLO_ADDR 6398 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_15_ALG0_SINGLEBANDLEVELDETS30015LINXLO_MEMORYPAGE 0 /* Module Level2_7 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007TCONST_ADDR 6273 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007HOLD_ADDR 6274 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007DECAY_ADDR 6275 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007X_ADDR 6283 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007XLO_ADDR 6284 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007LINX_ADDR 6285 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007LINXLO_ADDR 6286 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_7_ALG0_SINGLEBANDLEVELDETS3007LINXLO_MEMORYPAGE 0 /* Module Level2_9 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009TCONST_ADDR 6301 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009HOLD_ADDR 6302 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009DECAY_ADDR 6303 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009X_ADDR 6311 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009XLO_ADDR 6312 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009LINX_ADDR 6313 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009LINXLO_ADDR 6314 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_9_ALG0_SINGLEBANDLEVELDETS3009LINXLO_MEMORYPAGE 0 /* Module Level1_1 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_1_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_1_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041TCONST_ADDR 24 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041HOLD_ADDR 25 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041DECAY_ADDR 26 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041X_ADDR 34 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041XLO_ADDR 35 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041LINX_ADDR 36 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041LINXLO_ADDR 37 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_1_ALG0_SINGLEBANDLEVELDETS30041LINXLO_MEMORYPAGE 0 /* Module Level2_2 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002TCONST_ADDR 6203 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002HOLD_ADDR 6204 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002DECAY_ADDR 6205 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002X_ADDR 6213 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002XLO_ADDR 6214 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002LINX_ADDR 6215 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002LINXLO_ADDR 6216 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_2_ALG0_SINGLEBANDLEVELDETS3002LINXLO_MEMORYPAGE 0 /* Module Level1_26 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_26_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_26_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042TCONST_ADDR 374 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042HOLD_ADDR 375 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042DECAY_ADDR 376 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042X_ADDR 384 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042XLO_ADDR 385 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042LINX_ADDR 386 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042LINXLO_ADDR 387 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_26_ALG0_SINGLEBANDLEVELDETS30042LINXLO_MEMORYPAGE 0 /* Module Level1_30 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_30_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_30_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046TCONST_ADDR 430 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046HOLD_ADDR 431 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046DECAY_ADDR 432 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046X_ADDR 440 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046XLO_ADDR 441 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046LINX_ADDR 442 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046LINXLO_ADDR 443 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_30_ALG0_SINGLEBANDLEVELDETS30046LINXLO_MEMORYPAGE 0 /* Module Level1_21 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_21_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_21_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036TCONST_ADDR 304 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036HOLD_ADDR 305 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036DECAY_ADDR 306 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036X_ADDR 314 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036XLO_ADDR 315 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036LINX_ADDR 316 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036LINXLO_ADDR 317 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_21_ALG0_SINGLEBANDLEVELDETS30036LINXLO_MEMORYPAGE 0 /* Module Level1_23 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_23_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_23_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038TCONST_ADDR 332 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038HOLD_ADDR 333 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038DECAY_ADDR 334 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038X_ADDR 342 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038XLO_ADDR 343 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038LINX_ADDR 344 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038LINXLO_ADDR 345 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_23_ALG0_SINGLEBANDLEVELDETS30038LINXLO_MEMORYPAGE 0 /* Module Level2_8 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008TCONST_ADDR 6287 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008HOLD_ADDR 6288 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008DECAY_ADDR 6289 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008X_ADDR 6297 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008XLO_ADDR 6298 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008LINX_ADDR 6299 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008LINXLO_ADDR 6300 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_8_ALG0_SINGLEBANDLEVELDETS3008LINXLO_MEMORYPAGE 0 /* Module Level1_13 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_13_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_13_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028TCONST_ADDR 192 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028HOLD_ADDR 193 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028DECAY_ADDR 194 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028X_ADDR 202 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028XLO_ADDR 203 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028LINX_ADDR 204 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028LINXLO_ADDR 205 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_13_ALG0_SINGLEBANDLEVELDETS30028LINXLO_MEMORYPAGE 0 /* Module Level1_10 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_10_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_10_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025TCONST_ADDR 150 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025HOLD_ADDR 151 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025DECAY_ADDR 152 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025X_ADDR 160 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025XLO_ADDR 161 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025LINX_ADDR 162 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025LINXLO_ADDR 163 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_10_ALG0_SINGLEBANDLEVELDETS30025LINXLO_MEMORYPAGE 0 /* Module Level1_11 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_11_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_11_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026TCONST_ADDR 164 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026HOLD_ADDR 165 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026DECAY_ADDR 166 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026X_ADDR 174 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026XLO_ADDR 175 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026LINX_ADDR 176 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026LINXLO_ADDR 177 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_11_ALG0_SINGLEBANDLEVELDETS30026LINXLO_MEMORYPAGE 0 /* Module Level1_16 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_16_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_16_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031TCONST_ADDR 234 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031HOLD_ADDR 235 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031DECAY_ADDR 236 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031X_ADDR 244 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031XLO_ADDR 245 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031LINX_ADDR 246 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031LINXLO_ADDR 247 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_16_ALG0_SINGLEBANDLEVELDETS30031LINXLO_MEMORYPAGE 0 /* Module Level1_17 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_17_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_17_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032TCONST_ADDR 248 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032HOLD_ADDR 249 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032DECAY_ADDR 250 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032X_ADDR 258 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032XLO_ADDR 259 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032LINX_ADDR 260 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032LINXLO_ADDR 261 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_17_ALG0_SINGLEBANDLEVELDETS30032LINXLO_MEMORYPAGE 0 /* Module Level1_14 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_14_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_14_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029TCONST_ADDR 206 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029HOLD_ADDR 207 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029DECAY_ADDR 208 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029X_ADDR 216 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029XLO_ADDR 217 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029LINX_ADDR 218 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029LINXLO_ADDR 219 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_14_ALG0_SINGLEBANDLEVELDETS30029LINXLO_MEMORYPAGE 0 /* Module Level1_15 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_15_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_15_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030TCONST_ADDR 220 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030HOLD_ADDR 221 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030DECAY_ADDR 222 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030X_ADDR 230 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030XLO_ADDR 231 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030LINX_ADDR 232 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030LINXLO_ADDR 233 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_15_ALG0_SINGLEBANDLEVELDETS30030LINXLO_MEMORYPAGE 0 /* Module Level1_18 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_18_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_18_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033TCONST_ADDR 262 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033HOLD_ADDR 263 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033DECAY_ADDR 264 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033X_ADDR 272 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033XLO_ADDR 273 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033LINX_ADDR 274 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033LINXLO_ADDR 275 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_18_ALG0_SINGLEBANDLEVELDETS30033LINXLO_MEMORYPAGE 0 /* Module Level1_3 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_3_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_3_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018TCONST_ADDR 52 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018HOLD_ADDR 53 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018DECAY_ADDR 54 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018X_ADDR 62 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018XLO_ADDR 63 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018LINX_ADDR 64 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018LINXLO_ADDR 65 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_3_ALG0_SINGLEBANDLEVELDETS30018LINXLO_MEMORYPAGE 0 /* Module Level2_5 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005TCONST_ADDR 6245 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005HOLD_ADDR 6246 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005DECAY_ADDR 6247 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005X_ADDR 6255 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005XLO_ADDR 6256 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005LINX_ADDR 6257 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005LINXLO_ADDR 6258 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_5_ALG0_SINGLEBANDLEVELDETS3005LINXLO_MEMORYPAGE 0 /* Module Level1_5 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_5_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_5_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020TCONST_ADDR 80 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020HOLD_ADDR 81 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020DECAY_ADDR 82 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020X_ADDR 90 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020XLO_ADDR 91 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020LINX_ADDR 92 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020LINXLO_ADDR 93 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_5_ALG0_SINGLEBANDLEVELDETS30020LINXLO_MEMORYPAGE 0 /* Module Level1_7 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_7_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_7_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022TCONST_ADDR 108 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022HOLD_ADDR 109 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022DECAY_ADDR 110 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022X_ADDR 118 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022XLO_ADDR 119 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022LINX_ADDR 120 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022LINXLO_ADDR 121 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_7_ALG0_SINGLEBANDLEVELDETS30022LINXLO_MEMORYPAGE 0 /* Module Level2_3 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003TCONST_ADDR 6217 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003HOLD_ADDR 6218 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003DECAY_ADDR 6219 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003X_ADDR 6227 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003XLO_ADDR 6228 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003LINX_ADDR 6229 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003LINXLO_ADDR 6230 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_3_ALG0_SINGLEBANDLEVELDETS3003LINXLO_MEMORYPAGE 0 /* Module Level1_28 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_28_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_28_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044TCONST_ADDR 402 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044HOLD_ADDR 403 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044DECAY_ADDR 404 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044X_ADDR 412 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044XLO_ADDR 413 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044LINX_ADDR 414 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044LINXLO_ADDR 415 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_28_ALG0_SINGLEBANDLEVELDETS30044LINXLO_MEMORYPAGE 0 /* Module Level1_29 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_29_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_29_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045TCONST_ADDR 416 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045HOLD_ADDR 417 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045DECAY_ADDR 418 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045X_ADDR 426 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045XLO_ADDR 427 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045LINX_ADDR 428 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045LINXLO_ADDR 429 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_29_ALG0_SINGLEBANDLEVELDETS30045LINXLO_MEMORYPAGE 0 /* Module Level1_22 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_22_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_22_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037TCONST_ADDR 318 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037HOLD_ADDR 319 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037DECAY_ADDR 320 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037X_ADDR 328 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037XLO_ADDR 329 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037LINX_ADDR 330 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037LINXLO_ADDR 331 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_22_ALG0_SINGLEBANDLEVELDETS30037LINXLO_MEMORYPAGE 0 /* Module Level1_20 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_20_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_20_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035TCONST_ADDR 290 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035HOLD_ADDR 291 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035DECAY_ADDR 292 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035X_ADDR 300 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035XLO_ADDR 301 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035LINX_ADDR 302 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035LINXLO_ADDR 303 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_20_ALG0_SINGLEBANDLEVELDETS30035LINXLO_MEMORYPAGE 0 /* Module Level1_6 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_6_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_6_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021TCONST_ADDR 94 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021HOLD_ADDR 95 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021DECAY_ADDR 96 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021X_ADDR 104 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021XLO_ADDR 105 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021LINX_ADDR 106 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021LINXLO_ADDR 107 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_6_ALG0_SINGLEBANDLEVELDETS30021LINXLO_MEMORYPAGE 0 /* Module Level1_19 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_19_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_19_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034TCONST_ADDR 276 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034HOLD_ADDR 277 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034DECAY_ADDR 278 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034X_ADDR 286 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034XLO_ADDR 287 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034LINX_ADDR 288 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034LINXLO_ADDR 289 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_19_ALG0_SINGLEBANDLEVELDETS30034LINXLO_MEMORYPAGE 0 /* Module Level1_12 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_12_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_12_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027TCONST_ADDR 178 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027HOLD_ADDR 179 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027DECAY_ADDR 180 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027X_ADDR 188 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027XLO_ADDR 189 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027LINX_ADDR 190 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027LINXLO_ADDR 191 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_12_ALG0_SINGLEBANDLEVELDETS30027LINXLO_MEMORYPAGE 0 /* Module Level1_8 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_8_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_8_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023TCONST_ADDR 122 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023HOLD_ADDR 123 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023DECAY_ADDR 124 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023X_ADDR 132 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023XLO_ADDR 133 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023LINX_ADDR 134 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023LINXLO_ADDR 135 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_8_ALG0_SINGLEBANDLEVELDETS30023LINXLO_MEMORYPAGE 0 /* Module Level1_25 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_25_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_25_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040TCONST_ADDR 360 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040HOLD_ADDR 361 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040DECAY_ADDR 362 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040X_ADDR 370 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040XLO_ADDR 371 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040LINX_ADDR 372 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040LINXLO_ADDR 373 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_25_ALG0_SINGLEBANDLEVELDETS30040LINXLO_MEMORYPAGE 0 /* Module Level1_34 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_34_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_34_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050TCONST_ADDR 486 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050HOLD_ADDR 487 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050DECAY_ADDR 488 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050X_ADDR 496 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050XLO_ADDR 497 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050LINX_ADDR 498 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050LINXLO_ADDR 499 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_34_ALG0_SINGLEBANDLEVELDETS30050LINXLO_MEMORYPAGE 0 /* Module Level2_14 - Single Level Detector w Numerical Display*/ #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_COUNT 8 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_DEVICE "IC1" #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014_ADDR 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014TCONST_ADDR 6371 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014TCONST_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014HOLD_ADDR 6372 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014HOLD_FIXPT 0x000001E0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014HOLD_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014DECAY_ADDR 6373 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014DECAY_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014X_ADDR 6381 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014X_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014XLO_ADDR 6382 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014XLO_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014LINX_ADDR 6383 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014LINX_MEMORYPAGE 0 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014LINXLO_ADDR 6384 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_OUT_LEVEL_DETECTORS_LEVEL2_14_ALG0_SINGLEBANDLEVELDETS30014LINXLO_MEMORYPAGE 0 /* Module Level1_36 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_36_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_36_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052TCONST_ADDR 514 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052HOLD_ADDR 515 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052DECAY_ADDR 516 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052X_ADDR 524 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052XLO_ADDR 525 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052LINX_ADDR 526 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052LINXLO_ADDR 527 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_36_ALG0_SINGLEBANDLEVELDETS30052LINXLO_MEMORYPAGE 0 /* Module Level1_35 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_35_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_35_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051TCONST_ADDR 500 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051HOLD_ADDR 501 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051DECAY_ADDR 502 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051X_ADDR 510 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051XLO_ADDR 511 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051LINX_ADDR 512 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051LINXLO_ADDR 513 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_35_ALG0_SINGLEBANDLEVELDETS30051LINXLO_MEMORYPAGE 0 /* Module Level1_33 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_33_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_33_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049TCONST_ADDR 472 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049HOLD_ADDR 473 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049DECAY_ADDR 474 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049X_ADDR 482 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049XLO_ADDR 483 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049LINX_ADDR 484 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049LINXLO_ADDR 485 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_33_ALG0_SINGLEBANDLEVELDETS30049LINXLO_MEMORYPAGE 0 /* Module Level1_32 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_32_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_32_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048TCONST_ADDR 458 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048HOLD_ADDR 459 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048DECAY_ADDR 460 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048X_ADDR 468 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048XLO_ADDR 469 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048LINX_ADDR 470 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048LINXLO_ADDR 471 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_32_ALG0_SINGLEBANDLEVELDETS30048LINXLO_MEMORYPAGE 0 /* Module Level1_31 - Single Level Detector w Numerical Display*/ #define MOD_LEVEL_DETECTORS_LEVEL1_31_COUNT 8 #define MOD_LEVEL_DETECTORS_LEVEL1_31_DEVICE "IC1" #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047_ADDR 0 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047TCONST_ADDR 444 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047TCONST_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.00240140490349172) #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047TCONST_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047TCONST_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047HOLD_ADDR 445 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047HOLD_FIXPT 0x000001E0 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(480) #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047HOLD_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047DECAY_ADDR 446 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.000217013888888889) #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047DECAY_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047X_ADDR 454 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047X_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047X_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047X_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047XLO_ADDR 455 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047XLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047XLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047XLO_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047LINX_ADDR 456 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047LINX_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047LINX_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047LINX_MEMORYPAGE 0 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047LINXLO_ADDR 457 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047LINXLO_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047LINXLO_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_LEVEL_DETECTORS_LEVEL1_31_ALG0_SINGLEBANDLEVELDETS30047LINXLO_MEMORYPAGE 0 /* Module SafeLoadModule - SafeLoadModule*/ #define MOD_SAFELOADMODULE_COUNT 14 #define MOD_SAFELOADMODULE_DEVICE "IC1" #define MOD_SAFELOADMODULE_DATA_SAFELOAD0_ADDR 24576 #define MOD_SAFELOADMODULE_DATA_SAFELOAD0_MEMORYPAGE 0 #define MOD_SAFELOADMODULE_DATA_SAFELOAD1_ADDR 24577 #define MOD_SAFELOADMODULE_DATA_SAFELOAD1_MEMORYPAGE 0 #define MOD_SAFELOADMODULE_DATA_SAFELOAD2_ADDR 24578 #define MOD_SAFELOADMODULE_DATA_SAFELOAD2_MEMORYPAGE 0 #define MOD_SAFELOADMODULE_DATA_SAFELOAD3_ADDR 24579 #define MOD_SAFELOADMODULE_DATA_SAFELOAD3_MEMORYPAGE 0 #define MOD_SAFELOADMODULE_DATA_SAFELOAD4_ADDR 24580 #define MOD_SAFELOADMODULE_DATA_SAFELOAD4_MEMORYPAGE 0 #define MOD_SAFELOADMODULE_ADDRESS_SAFELOAD_ADDR 24581 #define MOD_SAFELOADMODULE_ADDRESS_SAFELOAD_MEMORYPAGE 0 #define MOD_SAFELOADMODULE_NUM_SAFELOAD_LOWER_ADDR 24582 #define MOD_SAFELOADMODULE_NUM_SAFELOAD_LOWER_MEMORYPAGE 0 #define MOD_SAFELOADMODULE_NUM_SAFELOAD_UPPER_ADDR 24583 #define MOD_SAFELOADMODULE_NUM_SAFELOAD_UPPER_MEMORYPAGE 0 /* Module Multiple_Pre_Gain - Multiple Volume Control*/ #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_COUNT 72 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_DEVICE "IC1" #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG2_TARGET_ADDR 529 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG2_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG2_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG2_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG2_SLEW_MODE_ADDR 530 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG2_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG2_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG2_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG2_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG20_TARGET_ADDR 532 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG20_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG20_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG20_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG20_SLEW_MODE_ADDR 533 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG20_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG20_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG20_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG20_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG15_TARGET_ADDR 535 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG15_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG15_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG15_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG15_SLEW_MODE_ADDR 536 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG15_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG15_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG15_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG15_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG13_TARGET_ADDR 538 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG13_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG13_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG13_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG13_SLEW_MODE_ADDR 539 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG13_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG13_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG13_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG13_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG35_TARGET_ADDR 541 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG35_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG35_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG35_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG35_SLEW_MODE_ADDR 542 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG35_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG35_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG35_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG35_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG4_TARGET_ADDR 544 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG4_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG4_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG4_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG4_SLEW_MODE_ADDR 545 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG4_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG4_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG4_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG4_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG17_TARGET_ADDR 547 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG17_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG17_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG17_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG17_SLEW_MODE_ADDR 548 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG17_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG17_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG17_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG17_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG8_TARGET_ADDR 550 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG8_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG8_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG8_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG8_SLEW_MODE_ADDR 551 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG8_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG8_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG8_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG8_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG10_TARGET_ADDR 553 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG10_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG10_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG10_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG10_SLEW_MODE_ADDR 554 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG10_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG10_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG10_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG10_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG12_TARGET_ADDR 556 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG12_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG12_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG12_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG12_SLEW_MODE_ADDR 557 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG12_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG12_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG12_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG12_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG31_TARGET_ADDR 559 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG31_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG31_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG31_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG31_SLEW_MODE_ADDR 560 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG31_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG31_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG31_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG31_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG1_TARGET_ADDR 562 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG1_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG1_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG1_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG1_SLEW_MODE_ADDR 563 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG1_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG1_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG1_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG1_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG21_TARGET_ADDR 565 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG21_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG21_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG21_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG21_SLEW_MODE_ADDR 566 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG21_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG21_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG21_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG21_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG23_TARGET_ADDR 568 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG23_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG23_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG23_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG23_SLEW_MODE_ADDR 569 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG23_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG23_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG23_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG23_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG30_TARGET_ADDR 571 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG30_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG30_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG30_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG30_SLEW_MODE_ADDR 572 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG30_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG30_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG30_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG30_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG6_TARGET_ADDR 574 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG6_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG6_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG6_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG6_SLEW_MODE_ADDR 575 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG6_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG6_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG6_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG6_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG7_TARGET_ADDR 577 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG7_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG7_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG7_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG7_SLEW_MODE_ADDR 578 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG7_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG7_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG7_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG7_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG24_TARGET_ADDR 580 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG24_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG24_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG24_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG24_SLEW_MODE_ADDR 581 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG24_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG24_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG24_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG24_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG34_TARGET_ADDR 583 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG34_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG34_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG34_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG34_SLEW_MODE_ADDR 584 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG34_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG34_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG34_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG34_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG19_TARGET_ADDR 586 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG19_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG19_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG19_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG19_SLEW_MODE_ADDR 587 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG19_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG19_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG19_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG19_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG18_TARGET_ADDR 589 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG18_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG18_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG18_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG18_SLEW_MODE_ADDR 590 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG18_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG18_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG18_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG18_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG28_TARGET_ADDR 592 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG28_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG28_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG28_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG28_SLEW_MODE_ADDR 593 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG28_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG28_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG28_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG28_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG25_TARGET_ADDR 595 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG25_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG25_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG25_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG25_SLEW_MODE_ADDR 596 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG25_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG25_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG25_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG25_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG5_TARGET_ADDR 598 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG5_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG5_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG5_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG5_SLEW_MODE_ADDR 599 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG5_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG5_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG5_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG5_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG33_TARGET_ADDR 601 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG33_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG33_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG33_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG33_SLEW_MODE_ADDR 602 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG33_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG33_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG33_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG33_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG14_TARGET_ADDR 604 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG14_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG14_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG14_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG14_SLEW_MODE_ADDR 605 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG14_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG14_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG14_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG14_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG16_TARGET_ADDR 607 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG16_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG16_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG16_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG16_SLEW_MODE_ADDR 608 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG16_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG16_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG16_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG16_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG29_TARGET_ADDR 610 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG29_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG29_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG29_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG29_SLEW_MODE_ADDR 611 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG29_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG29_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG29_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG29_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG3_TARGET_ADDR 613 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG3_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG3_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG3_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG3_SLEW_MODE_ADDR 614 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG3_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG3_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG3_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG3_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG26_TARGET_ADDR 616 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG26_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG26_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG26_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG26_SLEW_MODE_ADDR 617 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG26_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG26_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG26_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG26_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG27_TARGET_ADDR 619 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG27_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG27_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG27_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG27_SLEW_MODE_ADDR 620 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG27_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG27_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG27_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG27_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG0_TARGET_ADDR 622 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG0_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG0_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG0_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG0_SLEW_MODE_ADDR 623 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG0_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG0_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG0_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG0_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG22_TARGET_ADDR 625 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG22_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG22_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG22_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG22_SLEW_MODE_ADDR 626 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG22_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG22_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG22_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG22_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG32_TARGET_ADDR 628 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG32_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG32_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG32_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG32_SLEW_MODE_ADDR 629 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG32_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG32_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG32_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG32_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG11_TARGET_ADDR 631 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG11_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG11_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG11_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG11_SLEW_MODE_ADDR 632 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG11_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG11_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG11_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG11_SLEW_MODE_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG9_TARGET_ADDR 634 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG9_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG9_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG9_TARGET_MEMORYPAGE 0 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG9_SLEW_MODE_ADDR 635 #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG9_SLEW_MODE_FIXPT 0x0000208A #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG9_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG9_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_PRE_GAIN_MULTIPLE_PRE_GAIN_ALG9_SLEW_MODE_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_1 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B2_ADDR 636 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B1_ADDR 637 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B0_ADDR 638 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_A2_ADDR 639 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_A1_ADDR 640 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B2_ADDR 641 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B1_ADDR 642 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B0_ADDR 643 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_A2_ADDR 644 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_A1_ADDR 645 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B2_ADDR 646 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B1_ADDR 647 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B0_ADDR 648 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_A2_ADDR 649 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_A1_ADDR 650 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B2_ADDR 651 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B1_ADDR 652 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B0_ADDR 653 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_A2_ADDR 654 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_A1_ADDR 655 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B2_ADDR 656 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B1_ADDR 657 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B0_ADDR 658 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_A2_ADDR 659 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_A1_ADDR 660 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_1_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_2 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B2_ADDR 661 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B1_ADDR 662 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B0_ADDR 663 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_A2_ADDR 664 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_A1_ADDR 665 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B2_ADDR 666 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B1_ADDR 667 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B0_ADDR 668 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_A2_ADDR 669 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_A1_ADDR 670 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B2_ADDR 671 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B1_ADDR 672 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B0_ADDR 673 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_A2_ADDR 674 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_A1_ADDR 675 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B2_ADDR 676 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B1_ADDR 677 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B0_ADDR 678 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_A2_ADDR 679 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_A1_ADDR 680 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B2_ADDR 681 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B1_ADDR 682 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B0_ADDR 683 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_A2_ADDR 684 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_A1_ADDR 685 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_2_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_3 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B2_ADDR 686 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B1_ADDR 687 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B0_ADDR 688 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_A2_ADDR 689 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_A1_ADDR 690 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B2_ADDR 691 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B1_ADDR 692 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B0_ADDR 693 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_A2_ADDR 694 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_A1_ADDR 695 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B2_ADDR 696 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B1_ADDR 697 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B0_ADDR 698 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_A2_ADDR 699 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_A1_ADDR 700 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B2_ADDR 701 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B1_ADDR 702 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B0_ADDR 703 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_A2_ADDR 704 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_A1_ADDR 705 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B2_ADDR 706 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B1_ADDR 707 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B0_ADDR 708 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_A2_ADDR 709 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_A1_ADDR 710 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_3_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_4 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B2_ADDR 711 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B1_ADDR 712 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B0_ADDR 713 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_A2_ADDR 714 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_A1_ADDR 715 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B2_ADDR 716 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B1_ADDR 717 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B0_ADDR 718 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_A2_ADDR 719 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_A1_ADDR 720 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B2_ADDR 721 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B1_ADDR 722 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B0_ADDR 723 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_A2_ADDR 724 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_A1_ADDR 725 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B2_ADDR 726 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B1_ADDR 727 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B0_ADDR 728 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_A2_ADDR 729 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_A1_ADDR 730 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B2_ADDR 731 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B1_ADDR 732 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B0_ADDR 733 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_A2_ADDR 734 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_A1_ADDR 735 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_4_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_5 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B2_ADDR 736 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B1_ADDR 737 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B0_ADDR 738 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_A2_ADDR 739 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_A1_ADDR 740 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B2_ADDR 741 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B1_ADDR 742 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B0_ADDR 743 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_A2_ADDR 744 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_A1_ADDR 745 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B2_ADDR 746 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B1_ADDR 747 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B0_ADDR 748 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_A2_ADDR 749 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_A1_ADDR 750 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B2_ADDR 751 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B1_ADDR 752 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B0_ADDR 753 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_A2_ADDR 754 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_A1_ADDR 755 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B2_ADDR 756 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B1_ADDR 757 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B0_ADDR 758 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_A2_ADDR 759 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_A1_ADDR 760 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_5_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_6 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B2_ADDR 761 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B1_ADDR 762 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B0_ADDR 763 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_A2_ADDR 764 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_A1_ADDR 765 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B2_ADDR 766 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B1_ADDR 767 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B0_ADDR 768 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_A2_ADDR 769 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_A1_ADDR 770 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B2_ADDR 771 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B1_ADDR 772 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B0_ADDR 773 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_A2_ADDR 774 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_A1_ADDR 775 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B2_ADDR 776 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B1_ADDR 777 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B0_ADDR 778 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_A2_ADDR 779 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_A1_ADDR 780 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B2_ADDR 781 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B1_ADDR 782 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B0_ADDR 783 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_A2_ADDR 784 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_A1_ADDR 785 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_6_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_7 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B2_ADDR 786 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B1_ADDR 787 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B0_ADDR 788 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_A2_ADDR 789 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_A1_ADDR 790 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B2_ADDR 791 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B1_ADDR 792 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B0_ADDR 793 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_A2_ADDR 794 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_A1_ADDR 795 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B2_ADDR 796 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B1_ADDR 797 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B0_ADDR 798 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_A2_ADDR 799 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_A1_ADDR 800 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B2_ADDR 801 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B1_ADDR 802 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B0_ADDR 803 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_A2_ADDR 804 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_A1_ADDR 805 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B2_ADDR 806 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B1_ADDR 807 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B0_ADDR 808 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_A2_ADDR 809 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_A1_ADDR 810 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_7_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_8 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B2_ADDR 811 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B1_ADDR 812 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B0_ADDR 813 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_A2_ADDR 814 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_A1_ADDR 815 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B2_ADDR 816 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B1_ADDR 817 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B0_ADDR 818 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_A2_ADDR 819 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_A1_ADDR 820 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B2_ADDR 821 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B1_ADDR 822 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B0_ADDR 823 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_A2_ADDR 824 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_A1_ADDR 825 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B2_ADDR 826 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B1_ADDR 827 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B0_ADDR 828 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_A2_ADDR 829 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_A1_ADDR 830 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B2_ADDR 831 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B1_ADDR 832 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B0_ADDR 833 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_A2_ADDR 834 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_A1_ADDR 835 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_8_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_9 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B2_ADDR 836 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B1_ADDR 837 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B0_ADDR 838 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_A2_ADDR 839 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_A1_ADDR 840 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B2_ADDR 841 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B1_ADDR 842 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B0_ADDR 843 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_A2_ADDR 844 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_A1_ADDR 845 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B2_ADDR 846 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B1_ADDR 847 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B0_ADDR 848 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_A2_ADDR 849 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_A1_ADDR 850 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B2_ADDR 851 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B1_ADDR 852 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B0_ADDR 853 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_A2_ADDR 854 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_A1_ADDR 855 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B2_ADDR 856 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B1_ADDR 857 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B0_ADDR 858 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_A2_ADDR 859 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_A1_ADDR 860 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_9_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_10 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B2_ADDR 861 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B1_ADDR 862 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B0_ADDR 863 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_A2_ADDR 864 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_A1_ADDR 865 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B2_ADDR 866 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B1_ADDR 867 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B0_ADDR 868 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_A2_ADDR 869 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_A1_ADDR 870 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B2_ADDR 871 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B1_ADDR 872 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B0_ADDR 873 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_A2_ADDR 874 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_A1_ADDR 875 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B2_ADDR 876 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B1_ADDR 877 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B0_ADDR 878 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_A2_ADDR 879 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_A1_ADDR 880 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B2_ADDR 881 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B1_ADDR 882 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B0_ADDR 883 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_A2_ADDR 884 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_A1_ADDR 885 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_10_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_11 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B2_ADDR 886 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B1_ADDR 887 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B0_ADDR 888 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_A2_ADDR 889 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_A1_ADDR 890 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B2_ADDR 891 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B1_ADDR 892 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B0_ADDR 893 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_A2_ADDR 894 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_A1_ADDR 895 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B2_ADDR 896 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B1_ADDR 897 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B0_ADDR 898 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_A2_ADDR 899 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_A1_ADDR 900 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B2_ADDR 901 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B1_ADDR 902 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B0_ADDR 903 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_A2_ADDR 904 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_A1_ADDR 905 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B2_ADDR 906 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B1_ADDR 907 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B0_ADDR 908 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_A2_ADDR 909 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_A1_ADDR 910 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_11_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_12 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B2_ADDR 911 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B1_ADDR 912 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B0_ADDR 913 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_A2_ADDR 914 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_A1_ADDR 915 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B2_ADDR 916 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B1_ADDR 917 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B0_ADDR 918 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_A2_ADDR 919 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_A1_ADDR 920 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B2_ADDR 921 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B1_ADDR 922 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B0_ADDR 923 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_A2_ADDR 924 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_A1_ADDR 925 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B2_ADDR 926 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B1_ADDR 927 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B0_ADDR 928 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_A2_ADDR 929 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_A1_ADDR 930 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B2_ADDR 931 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B1_ADDR 932 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B0_ADDR 933 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_A2_ADDR 934 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_A1_ADDR 935 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_12_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_13 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B2_ADDR 936 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B1_ADDR 937 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B0_ADDR 938 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_A2_ADDR 939 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_A1_ADDR 940 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B2_ADDR 941 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B1_ADDR 942 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B0_ADDR 943 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_A2_ADDR 944 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_A1_ADDR 945 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B2_ADDR 946 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B1_ADDR 947 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B0_ADDR 948 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_A2_ADDR 949 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_A1_ADDR 950 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B2_ADDR 951 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B1_ADDR 952 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B0_ADDR 953 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_A2_ADDR 954 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_A1_ADDR 955 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B2_ADDR 956 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B1_ADDR 957 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B0_ADDR 958 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_A2_ADDR 959 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_A1_ADDR 960 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_13_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_14 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B2_ADDR 961 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B1_ADDR 962 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B0_ADDR 963 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_A2_ADDR 964 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_A1_ADDR 965 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B2_ADDR 966 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B1_ADDR 967 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B0_ADDR 968 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_A2_ADDR 969 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_A1_ADDR 970 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B2_ADDR 971 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B1_ADDR 972 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B0_ADDR 973 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_A2_ADDR 974 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_A1_ADDR 975 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B2_ADDR 976 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B1_ADDR 977 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B0_ADDR 978 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_A2_ADDR 979 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_A1_ADDR 980 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B2_ADDR 981 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B1_ADDR 982 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B0_ADDR 983 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_A2_ADDR 984 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_A1_ADDR 985 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_14_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_15 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B2_ADDR 986 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B1_ADDR 987 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B0_ADDR 988 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_A2_ADDR 989 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_A1_ADDR 990 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B2_ADDR 991 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B1_ADDR 992 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B0_ADDR 993 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_A2_ADDR 994 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_A1_ADDR 995 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B2_ADDR 996 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B1_ADDR 997 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B0_ADDR 998 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_A2_ADDR 999 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_A1_ADDR 1000 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B2_ADDR 1001 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B1_ADDR 1002 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B0_ADDR 1003 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_A2_ADDR 1004 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_A1_ADDR 1005 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B2_ADDR 1006 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B1_ADDR 1007 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B0_ADDR 1008 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_A2_ADDR 1009 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_A1_ADDR 1010 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_15_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_16 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B2_ADDR 1011 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B1_ADDR 1012 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B0_ADDR 1013 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_A2_ADDR 1014 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_A1_ADDR 1015 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B2_ADDR 1016 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B1_ADDR 1017 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B0_ADDR 1018 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_A2_ADDR 1019 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_A1_ADDR 1020 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B2_ADDR 1021 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B1_ADDR 1022 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B0_ADDR 1023 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_A2_ADDR 1024 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_A1_ADDR 1025 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B2_ADDR 1026 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B1_ADDR 1027 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B0_ADDR 1028 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_A2_ADDR 1029 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_A1_ADDR 1030 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B2_ADDR 1031 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B1_ADDR 1032 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B0_ADDR 1033 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_A2_ADDR 1034 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_A1_ADDR 1035 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_16_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_17 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B2_ADDR 1036 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B1_ADDR 1037 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B0_ADDR 1038 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_A2_ADDR 1039 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_A1_ADDR 1040 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B2_ADDR 1041 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B1_ADDR 1042 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B0_ADDR 1043 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_A2_ADDR 1044 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_A1_ADDR 1045 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B2_ADDR 1046 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B1_ADDR 1047 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B0_ADDR 1048 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_A2_ADDR 1049 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_A1_ADDR 1050 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B2_ADDR 1051 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B1_ADDR 1052 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B0_ADDR 1053 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_A2_ADDR 1054 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_A1_ADDR 1055 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B2_ADDR 1056 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B1_ADDR 1057 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B0_ADDR 1058 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_A2_ADDR 1059 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_A1_ADDR 1060 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_17_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_18 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B2_ADDR 1061 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B1_ADDR 1062 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B0_ADDR 1063 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_A2_ADDR 1064 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_A1_ADDR 1065 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B2_ADDR 1066 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B1_ADDR 1067 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B0_ADDR 1068 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_A2_ADDR 1069 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_A1_ADDR 1070 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B2_ADDR 1071 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B1_ADDR 1072 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B0_ADDR 1073 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_A2_ADDR 1074 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_A1_ADDR 1075 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B2_ADDR 1076 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B1_ADDR 1077 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B0_ADDR 1078 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_A2_ADDR 1079 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_A1_ADDR 1080 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B2_ADDR 1081 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B1_ADDR 1082 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B0_ADDR 1083 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_A2_ADDR 1084 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_A1_ADDR 1085 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_18_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_19 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B2_ADDR 1086 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B1_ADDR 1087 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B0_ADDR 1088 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_A2_ADDR 1089 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_A1_ADDR 1090 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B2_ADDR 1091 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B1_ADDR 1092 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B0_ADDR 1093 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_A2_ADDR 1094 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_A1_ADDR 1095 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B2_ADDR 1096 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B1_ADDR 1097 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B0_ADDR 1098 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_A2_ADDR 1099 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_A1_ADDR 1100 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B2_ADDR 1101 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B1_ADDR 1102 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B0_ADDR 1103 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_A2_ADDR 1104 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_A1_ADDR 1105 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B2_ADDR 1106 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B1_ADDR 1107 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B0_ADDR 1108 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_A2_ADDR 1109 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_A1_ADDR 1110 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_19_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_20 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B2_ADDR 1111 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B1_ADDR 1112 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B0_ADDR 1113 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_A2_ADDR 1114 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_A1_ADDR 1115 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B2_ADDR 1116 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B1_ADDR 1117 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B0_ADDR 1118 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_A2_ADDR 1119 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_A1_ADDR 1120 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B2_ADDR 1121 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B1_ADDR 1122 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B0_ADDR 1123 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_A2_ADDR 1124 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_A1_ADDR 1125 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B2_ADDR 1126 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B1_ADDR 1127 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B0_ADDR 1128 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_A2_ADDR 1129 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_A1_ADDR 1130 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B2_ADDR 1131 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B1_ADDR 1132 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B0_ADDR 1133 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_A2_ADDR 1134 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_A1_ADDR 1135 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_20_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_21 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B2_ADDR 1136 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B1_ADDR 1137 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B0_ADDR 1138 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_A2_ADDR 1139 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_A1_ADDR 1140 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B2_ADDR 1141 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B1_ADDR 1142 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B0_ADDR 1143 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_A2_ADDR 1144 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_A1_ADDR 1145 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B2_ADDR 1146 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B1_ADDR 1147 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B0_ADDR 1148 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_A2_ADDR 1149 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_A1_ADDR 1150 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B2_ADDR 1151 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B1_ADDR 1152 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B0_ADDR 1153 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_A2_ADDR 1154 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_A1_ADDR 1155 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B2_ADDR 1156 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B1_ADDR 1157 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B0_ADDR 1158 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_A2_ADDR 1159 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_A1_ADDR 1160 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_21_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_22 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B2_ADDR 1161 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B1_ADDR 1162 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B0_ADDR 1163 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_A2_ADDR 1164 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_A1_ADDR 1165 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B2_ADDR 1166 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B1_ADDR 1167 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B0_ADDR 1168 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_A2_ADDR 1169 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_A1_ADDR 1170 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B2_ADDR 1171 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B1_ADDR 1172 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B0_ADDR 1173 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_A2_ADDR 1174 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_A1_ADDR 1175 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B2_ADDR 1176 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B1_ADDR 1177 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B0_ADDR 1178 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_A2_ADDR 1179 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_A1_ADDR 1180 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B2_ADDR 1181 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B1_ADDR 1182 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B0_ADDR 1183 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_A2_ADDR 1184 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_A1_ADDR 1185 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_22_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_23 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B2_ADDR 1186 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B1_ADDR 1187 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B0_ADDR 1188 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_A2_ADDR 1189 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_A1_ADDR 1190 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B2_ADDR 1191 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B1_ADDR 1192 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B0_ADDR 1193 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_A2_ADDR 1194 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_A1_ADDR 1195 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B2_ADDR 1196 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B1_ADDR 1197 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B0_ADDR 1198 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_A2_ADDR 1199 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_A1_ADDR 1200 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B2_ADDR 1201 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B1_ADDR 1202 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B0_ADDR 1203 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_A2_ADDR 1204 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_A1_ADDR 1205 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B2_ADDR 1206 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B1_ADDR 1207 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B0_ADDR 1208 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_A2_ADDR 1209 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_A1_ADDR 1210 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_23_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_24 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B2_ADDR 1211 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B1_ADDR 1212 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B0_ADDR 1213 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_A2_ADDR 1214 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_A1_ADDR 1215 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B2_ADDR 1216 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B1_ADDR 1217 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B0_ADDR 1218 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_A2_ADDR 1219 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_A1_ADDR 1220 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B2_ADDR 1221 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B1_ADDR 1222 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B0_ADDR 1223 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_A2_ADDR 1224 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_A1_ADDR 1225 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B2_ADDR 1226 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B1_ADDR 1227 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B0_ADDR 1228 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_A2_ADDR 1229 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_A1_ADDR 1230 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B2_ADDR 1231 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B1_ADDR 1232 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B0_ADDR 1233 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_A2_ADDR 1234 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_A1_ADDR 1235 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_24_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_25 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B2_ADDR 1236 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B1_ADDR 1237 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B0_ADDR 1238 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_A2_ADDR 1239 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_A1_ADDR 1240 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B2_ADDR 1241 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B1_ADDR 1242 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B0_ADDR 1243 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_A2_ADDR 1244 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_A1_ADDR 1245 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B2_ADDR 1246 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B1_ADDR 1247 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B0_ADDR 1248 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_A2_ADDR 1249 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_A1_ADDR 1250 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B2_ADDR 1251 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B1_ADDR 1252 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B0_ADDR 1253 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_A2_ADDR 1254 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_A1_ADDR 1255 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B2_ADDR 1256 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B1_ADDR 1257 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B0_ADDR 1258 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_A2_ADDR 1259 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_A1_ADDR 1260 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_25_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_26 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B2_ADDR 1261 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B1_ADDR 1262 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B0_ADDR 1263 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_A2_ADDR 1264 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_A1_ADDR 1265 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B2_ADDR 1266 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B1_ADDR 1267 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B0_ADDR 1268 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_A2_ADDR 1269 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_A1_ADDR 1270 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B2_ADDR 1271 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B1_ADDR 1272 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B0_ADDR 1273 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_A2_ADDR 1274 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_A1_ADDR 1275 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B2_ADDR 1276 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B1_ADDR 1277 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B0_ADDR 1278 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_A2_ADDR 1279 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_A1_ADDR 1280 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B2_ADDR 1281 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B1_ADDR 1282 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B0_ADDR 1283 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_A2_ADDR 1284 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_A1_ADDR 1285 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_26_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_27 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B2_ADDR 1286 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B1_ADDR 1287 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B0_ADDR 1288 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_A2_ADDR 1289 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_A1_ADDR 1290 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B2_ADDR 1291 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B1_ADDR 1292 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B0_ADDR 1293 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_A2_ADDR 1294 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_A1_ADDR 1295 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B2_ADDR 1296 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B1_ADDR 1297 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B0_ADDR 1298 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_A2_ADDR 1299 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_A1_ADDR 1300 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B2_ADDR 1301 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B1_ADDR 1302 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B0_ADDR 1303 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_A2_ADDR 1304 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_A1_ADDR 1305 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B2_ADDR 1306 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B1_ADDR 1307 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B0_ADDR 1308 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_A2_ADDR 1309 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_A1_ADDR 1310 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_27_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_28 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B2_ADDR 1311 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B1_ADDR 1312 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B0_ADDR 1313 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_A2_ADDR 1314 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_A1_ADDR 1315 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B2_ADDR 1316 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B1_ADDR 1317 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B0_ADDR 1318 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_A2_ADDR 1319 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_A1_ADDR 1320 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B2_ADDR 1321 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B1_ADDR 1322 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B0_ADDR 1323 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_A2_ADDR 1324 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_A1_ADDR 1325 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B2_ADDR 1326 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B1_ADDR 1327 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B0_ADDR 1328 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_A2_ADDR 1329 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_A1_ADDR 1330 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B2_ADDR 1331 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B1_ADDR 1332 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B0_ADDR 1333 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_A2_ADDR 1334 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_A1_ADDR 1335 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_28_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_29 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B2_ADDR 1336 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B1_ADDR 1337 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B0_ADDR 1338 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_A2_ADDR 1339 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_A1_ADDR 1340 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B2_ADDR 1341 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B1_ADDR 1342 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B0_ADDR 1343 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_A2_ADDR 1344 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_A1_ADDR 1345 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B2_ADDR 1346 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B1_ADDR 1347 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B0_ADDR 1348 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_A2_ADDR 1349 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_A1_ADDR 1350 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B2_ADDR 1351 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B1_ADDR 1352 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B0_ADDR 1353 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_A2_ADDR 1354 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_A1_ADDR 1355 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B2_ADDR 1356 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B1_ADDR 1357 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B0_ADDR 1358 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_A2_ADDR 1359 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_A1_ADDR 1360 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_29_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_30 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B2_ADDR 1361 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B1_ADDR 1362 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B0_ADDR 1363 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_A2_ADDR 1364 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_A1_ADDR 1365 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B2_ADDR 1366 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B1_ADDR 1367 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B0_ADDR 1368 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_A2_ADDR 1369 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_A1_ADDR 1370 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B2_ADDR 1371 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B1_ADDR 1372 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B0_ADDR 1373 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_A2_ADDR 1374 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_A1_ADDR 1375 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B2_ADDR 1376 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B1_ADDR 1377 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B0_ADDR 1378 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_A2_ADDR 1379 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_A1_ADDR 1380 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B2_ADDR 1381 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B1_ADDR 1382 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B0_ADDR 1383 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_A2_ADDR 1384 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_A1_ADDR 1385 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_30_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_31 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B2_ADDR 1386 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B1_ADDR 1387 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B0_ADDR 1388 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_A2_ADDR 1389 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_A1_ADDR 1390 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B2_ADDR 1391 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B1_ADDR 1392 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B0_ADDR 1393 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_A2_ADDR 1394 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_A1_ADDR 1395 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B2_ADDR 1396 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B1_ADDR 1397 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B0_ADDR 1398 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_A2_ADDR 1399 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_A1_ADDR 1400 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B2_ADDR 1401 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B1_ADDR 1402 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B0_ADDR 1403 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_A2_ADDR 1404 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_A1_ADDR 1405 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B2_ADDR 1406 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B1_ADDR 1407 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B0_ADDR 1408 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_A2_ADDR 1409 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_A1_ADDR 1410 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_31_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_32 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B2_ADDR 1411 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B1_ADDR 1412 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B0_ADDR 1413 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_A2_ADDR 1414 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_A1_ADDR 1415 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B2_ADDR 1416 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B1_ADDR 1417 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B0_ADDR 1418 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_A2_ADDR 1419 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_A1_ADDR 1420 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B2_ADDR 1421 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B1_ADDR 1422 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B0_ADDR 1423 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_A2_ADDR 1424 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_A1_ADDR 1425 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B2_ADDR 1426 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B1_ADDR 1427 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B0_ADDR 1428 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_A2_ADDR 1429 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_A1_ADDR 1430 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B2_ADDR 1431 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B1_ADDR 1432 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B0_ADDR 1433 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_A2_ADDR 1434 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_A1_ADDR 1435 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_32_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_33 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B2_ADDR 1436 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B1_ADDR 1437 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B0_ADDR 1438 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_A2_ADDR 1439 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_A1_ADDR 1440 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B2_ADDR 1441 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B1_ADDR 1442 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B0_ADDR 1443 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_A2_ADDR 1444 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_A1_ADDR 1445 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B2_ADDR 1446 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B1_ADDR 1447 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B0_ADDR 1448 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_A2_ADDR 1449 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_A1_ADDR 1450 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B2_ADDR 1451 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B1_ADDR 1452 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B0_ADDR 1453 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_A2_ADDR 1454 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_A1_ADDR 1455 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B2_ADDR 1456 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B1_ADDR 1457 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B0_ADDR 1458 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_A2_ADDR 1459 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_A1_ADDR 1460 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_33_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_34 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B2_ADDR 1461 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B1_ADDR 1462 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B0_ADDR 1463 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_A2_ADDR 1464 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_A1_ADDR 1465 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B2_ADDR 1466 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B1_ADDR 1467 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B0_ADDR 1468 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_A2_ADDR 1469 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_A1_ADDR 1470 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B2_ADDR 1471 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B1_ADDR 1472 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B0_ADDR 1473 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_A2_ADDR 1474 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_A1_ADDR 1475 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B2_ADDR 1476 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B1_ADDR 1477 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B0_ADDR 1478 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_A2_ADDR 1479 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_A1_ADDR 1480 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B2_ADDR 1481 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B1_ADDR 1482 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B0_ADDR 1483 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_A2_ADDR 1484 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_A1_ADDR 1485 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_34_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_35 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B2_ADDR 1486 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B1_ADDR 1487 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B0_ADDR 1488 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_A2_ADDR 1489 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_A1_ADDR 1490 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B2_ADDR 1491 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B1_ADDR 1492 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B0_ADDR 1493 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_A2_ADDR 1494 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_A1_ADDR 1495 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B2_ADDR 1496 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B1_ADDR 1497 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B0_ADDR 1498 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_A2_ADDR 1499 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_A1_ADDR 1500 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B2_ADDR 1501 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B1_ADDR 1502 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B0_ADDR 1503 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_A2_ADDR 1504 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_A1_ADDR 1505 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B2_ADDR 1506 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B1_ADDR 1507 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B0_ADDR 1508 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_A2_ADDR 1509 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_A1_ADDR 1510 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_35_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Pre_Gen_Filter1_36 - General Eq (2nd order)*/ #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_COUNT 25 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_DEVICE "IC1" #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B2_ADDR 1511 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B1_ADDR 1512 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B0_ADDR 1513 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_A2_ADDR 1514 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_A1_ADDR 1515 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B2_ADDR 1516 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B1_ADDR 1517 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B0_ADDR 1518 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_A2_ADDR 1519 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_A1_ADDR 1520 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B2_ADDR 1521 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B1_ADDR 1522 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B0_ADDR 1523 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_A2_ADDR 1524 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_A1_ADDR 1525 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B2_ADDR 1526 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B1_ADDR 1527 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B0_ADDR 1528 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_A2_ADDR 1529 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_A1_ADDR 1530 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B2_ADDR 1531 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B1_ADDR 1532 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B0_ADDR 1533 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_A2_ADDR 1534 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_A1_ADDR 1535 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_PRE_GEN_FILTER1_36_ALG0_STAGE4_A1_MEMORYPAGE 0 /* Module Delay1_1 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_1_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_1_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_1_DELAYAMT_ADDR 1536 #define MOD_INUPT_DELAY_DELAY1_1_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_1_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_1_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_1_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_2 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_2_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_2_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_2_DELAYAMT_ADDR 1537 #define MOD_INUPT_DELAY_DELAY1_2_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_2_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_2_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_2_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_3 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_3_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_3_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_3_DELAYAMT_ADDR 1538 #define MOD_INUPT_DELAY_DELAY1_3_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_3_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_3_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_3_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_4 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_4_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_4_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_4_DELAYAMT_ADDR 1539 #define MOD_INUPT_DELAY_DELAY1_4_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_4_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_4_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_4_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_5 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_5_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_5_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_5_DELAYAMT_ADDR 1540 #define MOD_INUPT_DELAY_DELAY1_5_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_5_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_5_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_5_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_6 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_6_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_6_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_6_DELAYAMT_ADDR 1541 #define MOD_INUPT_DELAY_DELAY1_6_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_6_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_6_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_6_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_7 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_7_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_7_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_7_DELAYAMT_ADDR 1542 #define MOD_INUPT_DELAY_DELAY1_7_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_7_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_7_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_7_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_8 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_8_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_8_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_8_DELAYAMT_ADDR 1543 #define MOD_INUPT_DELAY_DELAY1_8_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_8_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_8_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_8_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_9 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_9_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_9_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_9_DELAYAMT_ADDR 1544 #define MOD_INUPT_DELAY_DELAY1_9_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_9_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_9_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_9_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_10 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_10_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_10_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_10_DELAYAMT_ADDR 1545 #define MOD_INUPT_DELAY_DELAY1_10_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_10_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_10_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_10_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_11 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_11_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_11_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_11_DELAYAMT_ADDR 1546 #define MOD_INUPT_DELAY_DELAY1_11_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_11_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_11_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_11_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_12 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_12_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_12_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_12_DELAYAMT_ADDR 1547 #define MOD_INUPT_DELAY_DELAY1_12_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_12_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_12_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_12_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_13 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_13_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_13_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_13_DELAYAMT_ADDR 1548 #define MOD_INUPT_DELAY_DELAY1_13_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_13_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_13_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_13_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_14 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_14_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_14_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_14_DELAYAMT_ADDR 1549 #define MOD_INUPT_DELAY_DELAY1_14_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_14_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_14_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_14_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_15 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_15_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_15_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_15_DELAYAMT_ADDR 1550 #define MOD_INUPT_DELAY_DELAY1_15_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_15_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_15_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_15_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_16 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_16_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_16_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_16_DELAYAMT_ADDR 1551 #define MOD_INUPT_DELAY_DELAY1_16_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_16_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_16_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_16_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_17 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_17_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_17_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_17_DELAYAMT_ADDR 1552 #define MOD_INUPT_DELAY_DELAY1_17_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_17_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_17_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_17_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_18 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_18_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_18_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_18_DELAYAMT_ADDR 1553 #define MOD_INUPT_DELAY_DELAY1_18_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_18_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_18_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_18_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_19 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_19_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_19_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_19_DELAYAMT_ADDR 1554 #define MOD_INUPT_DELAY_DELAY1_19_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_19_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_19_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_19_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_20 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_20_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_20_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_20_DELAYAMT_ADDR 1555 #define MOD_INUPT_DELAY_DELAY1_20_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_20_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_20_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_20_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_21 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_21_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_21_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_21_DELAYAMT_ADDR 1556 #define MOD_INUPT_DELAY_DELAY1_21_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_21_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_21_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_21_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_22 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_22_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_22_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_22_DELAYAMT_ADDR 1557 #define MOD_INUPT_DELAY_DELAY1_22_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_22_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_22_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_22_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_23 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_23_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_23_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_23_DELAYAMT_ADDR 1558 #define MOD_INUPT_DELAY_DELAY1_23_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_23_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_23_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_23_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_24 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_24_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_24_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_24_DELAYAMT_ADDR 1559 #define MOD_INUPT_DELAY_DELAY1_24_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_24_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_24_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_24_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_25 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_25_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_25_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_25_DELAYAMT_ADDR 1560 #define MOD_INUPT_DELAY_DELAY1_25_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_25_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_25_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_25_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_26 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_26_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_26_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_26_DELAYAMT_ADDR 1561 #define MOD_INUPT_DELAY_DELAY1_26_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_26_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_26_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_26_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_27 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_27_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_27_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_27_DELAYAMT_ADDR 1562 #define MOD_INUPT_DELAY_DELAY1_27_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_27_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_27_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_27_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_28 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_28_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_28_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_28_DELAYAMT_ADDR 1563 #define MOD_INUPT_DELAY_DELAY1_28_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_28_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_28_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_28_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_29 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_29_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_29_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_29_DELAYAMT_ADDR 1564 #define MOD_INUPT_DELAY_DELAY1_29_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_29_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_29_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_29_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_30 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_30_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_30_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_30_DELAYAMT_ADDR 1565 #define MOD_INUPT_DELAY_DELAY1_30_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_30_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_30_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_30_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_31 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_31_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_31_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_31_DELAYAMT_ADDR 1566 #define MOD_INUPT_DELAY_DELAY1_31_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_31_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_31_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_31_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_32 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_32_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_32_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_32_DELAYAMT_ADDR 1567 #define MOD_INUPT_DELAY_DELAY1_32_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_32_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_32_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_32_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_33 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_33_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_33_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_33_DELAYAMT_ADDR 1568 #define MOD_INUPT_DELAY_DELAY1_33_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_33_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_33_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_33_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_34 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_34_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_34_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_34_DELAYAMT_ADDR 1569 #define MOD_INUPT_DELAY_DELAY1_34_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_34_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_34_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_34_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_35 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_35_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_35_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_35_DELAYAMT_ADDR 1570 #define MOD_INUPT_DELAY_DELAY1_35_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_35_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_35_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_35_DELAYAMT_MEMORYPAGE 0 /* Module Delay1_36 - Delay*/ #define MOD_INUPT_DELAY_DELAY1_36_COUNT 1 #define MOD_INUPT_DELAY_DELAY1_36_DEVICE "IC1" #define MOD_INUPT_DELAY_DELAY1_36_DELAYAMT_ADDR 1571 #define MOD_INUPT_DELAY_DELAY1_36_DELAYAMT_FIXPT 0x00000000 #define MOD_INUPT_DELAY_DELAY1_36_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_INUPT_DELAY_DELAY1_36_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_INUPT_DELAY_DELAY1_36_DELAYAMT_MEMORYPAGE 0 /* Module Switch_HW - Stereo Switch Nx2*/ #define MOD_SWITCH_HW_COUNT 5 #define MOD_SWITCH_HW_DEVICE "IC1" #define MOD_SWITCH_HW_ALG0_SLEW_MODE_ADDR 1572 #define MOD_SWITCH_HW_ALG0_SLEW_MODE_FIXPT 0x0000208A #define MOD_SWITCH_HW_ALG0_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_SWITCH_HW_ALG0_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_SWITCH_HW_ALG0_SLEW_MODE_MEMORYPAGE 0 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL00_ADDR 15092 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL00_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL00_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL00_MEMORYPAGE 0 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL01_ADDR 15093 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL01_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL01_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL01_MEMORYPAGE 0 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL02_ADDR 15094 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL02_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL02_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL02_MEMORYPAGE 0 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL03_ADDR 15095 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL03_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL03_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_SWITCH_HW_ALG0_STEREOMUXSIGMA3001VOL03_MEMORYPAGE 0 /* Module Mute2 - Multiple Control Mute*/ #define MOD_MUTE2_COUNT 17 #define MOD_MUTE2_DEVICE "IC1" #define MOD_MUTE2_ALG0_SLEW_MODE_ADDR 1573 #define MOD_MUTE2_ALG0_SLEW_MODE_FIXPT 0x0000208A #define MOD_MUTE2_ALG0_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_MUTE2_ALG0_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_MUTE2_ALG0_SLEW_MODE_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE0_ADDR 1590 #define MOD_MUTE2_ALG0_MUTE0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE0_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE1_ADDR 1591 #define MOD_MUTE2_ALG0_MUTE1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE1_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE2_ADDR 1592 #define MOD_MUTE2_ALG0_MUTE2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE2_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE3_ADDR 1593 #define MOD_MUTE2_ALG0_MUTE3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE3_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE4_ADDR 1594 #define MOD_MUTE2_ALG0_MUTE4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE4_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE5_ADDR 1595 #define MOD_MUTE2_ALG0_MUTE5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE5_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE6_ADDR 1596 #define MOD_MUTE2_ALG0_MUTE6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE6_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE7_ADDR 1597 #define MOD_MUTE2_ALG0_MUTE7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE7_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE8_ADDR 1598 #define MOD_MUTE2_ALG0_MUTE8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE8_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE9_ADDR 1599 #define MOD_MUTE2_ALG0_MUTE9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE9_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE10_ADDR 1600 #define MOD_MUTE2_ALG0_MUTE10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE10_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE11_ADDR 1601 #define MOD_MUTE2_ALG0_MUTE11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE11_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE12_ADDR 1602 #define MOD_MUTE2_ALG0_MUTE12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE12_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE13_ADDR 1603 #define MOD_MUTE2_ALG0_MUTE13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE13_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE14_ADDR 1604 #define MOD_MUTE2_ALG0_MUTE14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE14_MEMORYPAGE 0 #define MOD_MUTE2_ALG0_MUTE15_ADDR 1605 #define MOD_MUTE2_ALG0_MUTE15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE2_ALG0_MUTE15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE2_ALG0_MUTE15_MEMORYPAGE 0 /* Module Mute1 - Multiple Control Mute*/ #define MOD_MUTE1_COUNT 17 #define MOD_MUTE1_DEVICE "IC1" #define MOD_MUTE1_ALG0_SLEW_MODE_ADDR 1606 #define MOD_MUTE1_ALG0_SLEW_MODE_FIXPT 0x0000208A #define MOD_MUTE1_ALG0_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_MUTE1_ALG0_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_MUTE1_ALG0_SLEW_MODE_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE0_ADDR 1623 #define MOD_MUTE1_ALG0_MUTE0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE0_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE1_ADDR 1624 #define MOD_MUTE1_ALG0_MUTE1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE1_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE2_ADDR 1625 #define MOD_MUTE1_ALG0_MUTE2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE2_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE3_ADDR 1626 #define MOD_MUTE1_ALG0_MUTE3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE3_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE4_ADDR 1627 #define MOD_MUTE1_ALG0_MUTE4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE4_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE5_ADDR 1628 #define MOD_MUTE1_ALG0_MUTE5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE5_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE6_ADDR 1629 #define MOD_MUTE1_ALG0_MUTE6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE6_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE7_ADDR 1630 #define MOD_MUTE1_ALG0_MUTE7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE7_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE8_ADDR 1631 #define MOD_MUTE1_ALG0_MUTE8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE8_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE9_ADDR 1632 #define MOD_MUTE1_ALG0_MUTE9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE9_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE10_ADDR 1633 #define MOD_MUTE1_ALG0_MUTE10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE10_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE11_ADDR 1634 #define MOD_MUTE1_ALG0_MUTE11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE11_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE12_ADDR 1635 #define MOD_MUTE1_ALG0_MUTE12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE12_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE13_ADDR 1636 #define MOD_MUTE1_ALG0_MUTE13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE13_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE14_ADDR 1637 #define MOD_MUTE1_ALG0_MUTE14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE14_MEMORYPAGE 0 #define MOD_MUTE1_ALG0_MUTE15_ADDR 1638 #define MOD_MUTE1_ALG0_MUTE15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE1_ALG0_MUTE15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE1_ALG0_MUTE15_MEMORYPAGE 0 /* Module Mute - Mute*/ #define MOD_MUTE_COUNT 4 #define MOD_MUTE_DEVICE "IC1" #define MOD_MUTE_ALG1_SLEW_MODE_ADDR 1640 #define MOD_MUTE_ALG1_SLEW_MODE_FIXPT 0x0000208A #define MOD_MUTE_ALG1_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_MUTE_ALG1_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_MUTE_ALG1_SLEW_MODE_MEMORYPAGE 0 #define MOD_MUTE_ALG1_MUTE_ADDR 1641 #define MOD_MUTE_ALG1_MUTE_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE_ALG1_MUTE_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE_ALG1_MUTE_MEMORYPAGE 0 #define MOD_MUTE_ALG0_SLEW_MODE_ADDR 1643 #define MOD_MUTE_ALG0_SLEW_MODE_FIXPT 0x0000208A #define MOD_MUTE_ALG0_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_MUTE_ALG0_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_MUTE_ALG0_SLEW_MODE_MEMORYPAGE 0 #define MOD_MUTE_ALG0_MUTE_ADDR 1644 #define MOD_MUTE_ALG0_MUTE_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MUTE_ALG0_MUTE_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MUTE_ALG0_MUTE_MEMORYPAGE 0 /* Module Gen_Filter1_1 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_1_COUNT 10 #define MOD_EQ_GEN_FILTER1_1_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B2_ADDR 2157 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B1_ADDR 2158 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B0_ADDR 2159 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_A2_ADDR 2160 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_A1_ADDR 2161 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B2_ADDR 2162 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B1_ADDR 2163 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B0_ADDR 2164 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_A2_ADDR 2165 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_A1_ADDR 2166 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_1_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_2 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_2_COUNT 10 #define MOD_EQ_GEN_FILTER1_2_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B2_ADDR 2167 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B1_ADDR 2168 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B0_ADDR 2169 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_A2_ADDR 2170 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_A1_ADDR 2171 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B2_ADDR 2172 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B1_ADDR 2173 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B0_ADDR 2174 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_A2_ADDR 2175 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_A1_ADDR 2176 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_2_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_3 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_3_COUNT 10 #define MOD_EQ_GEN_FILTER1_3_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B2_ADDR 2177 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B1_ADDR 2178 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B0_ADDR 2179 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_A2_ADDR 2180 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_A1_ADDR 2181 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B2_ADDR 2182 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B1_ADDR 2183 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B0_ADDR 2184 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_A2_ADDR 2185 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_A1_ADDR 2186 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_3_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_4 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_4_COUNT 10 #define MOD_EQ_GEN_FILTER1_4_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B2_ADDR 2187 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B1_ADDR 2188 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B0_ADDR 2189 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_A2_ADDR 2190 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_A1_ADDR 2191 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B2_ADDR 2192 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B1_ADDR 2193 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B0_ADDR 2194 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_A2_ADDR 2195 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_A1_ADDR 2196 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_4_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_5 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_5_COUNT 10 #define MOD_EQ_GEN_FILTER1_5_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B2_ADDR 2197 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B1_ADDR 2198 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B0_ADDR 2199 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_A2_ADDR 2200 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_A1_ADDR 2201 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B2_ADDR 2202 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B1_ADDR 2203 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B0_ADDR 2204 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_A2_ADDR 2205 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_A1_ADDR 2206 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_5_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_6 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_6_COUNT 10 #define MOD_EQ_GEN_FILTER1_6_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B2_ADDR 2207 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B1_ADDR 2208 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B0_ADDR 2209 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_A2_ADDR 2210 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_A1_ADDR 2211 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B2_ADDR 2212 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B1_ADDR 2213 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B0_ADDR 2214 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_A2_ADDR 2215 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_A1_ADDR 2216 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_6_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_7 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_7_COUNT 10 #define MOD_EQ_GEN_FILTER1_7_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B2_ADDR 2217 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B1_ADDR 2218 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B0_ADDR 2219 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_A2_ADDR 2220 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_A1_ADDR 2221 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B2_ADDR 2222 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B1_ADDR 2223 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B0_ADDR 2224 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_A2_ADDR 2225 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_A1_ADDR 2226 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_7_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_8 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_8_COUNT 10 #define MOD_EQ_GEN_FILTER1_8_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B2_ADDR 2227 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B1_ADDR 2228 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B0_ADDR 2229 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_A2_ADDR 2230 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_A1_ADDR 2231 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B2_ADDR 2232 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B1_ADDR 2233 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B0_ADDR 2234 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_A2_ADDR 2235 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_A1_ADDR 2236 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_8_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_9 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_9_COUNT 10 #define MOD_EQ_GEN_FILTER1_9_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B2_ADDR 2237 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B1_ADDR 2238 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B0_ADDR 2239 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_A2_ADDR 2240 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_A1_ADDR 2241 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B2_ADDR 2242 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B1_ADDR 2243 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B0_ADDR 2244 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_A2_ADDR 2245 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_A1_ADDR 2246 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_9_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_10 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_10_COUNT 10 #define MOD_EQ_GEN_FILTER1_10_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B2_ADDR 2247 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B1_ADDR 2248 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B0_ADDR 2249 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_A2_ADDR 2250 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_A1_ADDR 2251 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B2_ADDR 2252 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B1_ADDR 2253 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B0_ADDR 2254 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_A2_ADDR 2255 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_A1_ADDR 2256 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_10_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_11 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_11_COUNT 10 #define MOD_EQ_GEN_FILTER1_11_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B2_ADDR 2257 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B1_ADDR 2258 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B0_ADDR 2259 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_A2_ADDR 2260 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_A1_ADDR 2261 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B2_ADDR 2262 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B1_ADDR 2263 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B0_ADDR 2264 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_A2_ADDR 2265 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_A1_ADDR 2266 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_11_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_12 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_12_COUNT 10 #define MOD_EQ_GEN_FILTER1_12_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B2_ADDR 2267 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B1_ADDR 2268 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B0_ADDR 2269 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_A2_ADDR 2270 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_A1_ADDR 2271 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B2_ADDR 2272 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B1_ADDR 2273 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B0_ADDR 2274 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_A2_ADDR 2275 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_A1_ADDR 2276 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_12_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_13 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_13_COUNT 10 #define MOD_EQ_GEN_FILTER1_13_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B2_ADDR 2277 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B1_ADDR 2278 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B0_ADDR 2279 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_A2_ADDR 2280 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_A1_ADDR 2281 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B2_ADDR 2282 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B1_ADDR 2283 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B0_ADDR 2284 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_A2_ADDR 2285 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_A1_ADDR 2286 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_13_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_14 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_14_COUNT 10 #define MOD_EQ_GEN_FILTER1_14_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B2_ADDR 2287 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B1_ADDR 2288 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B0_ADDR 2289 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_A2_ADDR 2290 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_A1_ADDR 2291 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B2_ADDR 2292 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B1_ADDR 2293 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B0_ADDR 2294 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_A2_ADDR 2295 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_A1_ADDR 2296 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_14_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_15 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_15_COUNT 10 #define MOD_EQ_GEN_FILTER1_15_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B2_ADDR 2297 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B1_ADDR 2298 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B0_ADDR 2299 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_A2_ADDR 2300 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_A1_ADDR 2301 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B2_ADDR 2302 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B1_ADDR 2303 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B0_ADDR 2304 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_A2_ADDR 2305 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_A1_ADDR 2306 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_15_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter1_16 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER1_16_COUNT 10 #define MOD_EQ_GEN_FILTER1_16_DEVICE "IC1" #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B2_ADDR 2307 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B1_ADDR 2308 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B0_ADDR 2309 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_A2_ADDR 2310 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_A1_ADDR 2311 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B2_ADDR 2312 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B1_ADDR 2313 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B0_ADDR 2314 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_A2_ADDR 2315 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_A1_ADDR 2316 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER1_16_ALG0_STAGE1_A1_MEMORYPAGE 0 /* Module Gen_Filter2_1 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_1_COUNT 80 #define MOD_EQ_GEN_FILTER2_1_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B2_ADDR 2317 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B1_ADDR 2318 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B0_ADDR 2319 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_A2_ADDR 2320 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_A1_ADDR 2321 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B2_ADDR 2322 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B1_ADDR 2323 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B0_ADDR 2324 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_A2_ADDR 2325 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_A1_ADDR 2326 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B2_ADDR 2327 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B1_ADDR 2328 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B0_ADDR 2329 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_A2_ADDR 2330 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_A1_ADDR 2331 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B2_ADDR 2332 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B1_ADDR 2333 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B0_ADDR 2334 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_A2_ADDR 2335 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_A1_ADDR 2336 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B2_ADDR 2337 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B1_ADDR 2338 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B0_ADDR 2339 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_A2_ADDR 2340 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_A1_ADDR 2341 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B2_ADDR 2342 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B1_ADDR 2343 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B0_ADDR 2344 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_A2_ADDR 2345 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_A1_ADDR 2346 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B2_ADDR 2347 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B1_ADDR 2348 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B0_ADDR 2349 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_A2_ADDR 2350 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_A1_ADDR 2351 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B2_ADDR 2352 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B1_ADDR 2353 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B0_ADDR 2354 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_A2_ADDR 2355 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_A1_ADDR 2356 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B2_ADDR 2357 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B1_ADDR 2358 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B0_ADDR 2359 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_A2_ADDR 2360 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_A1_ADDR 2361 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B2_ADDR 2362 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B1_ADDR 2363 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B0_ADDR 2364 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_A2_ADDR 2365 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_A1_ADDR 2366 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B2_ADDR 2367 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B1_ADDR 2368 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B0_ADDR 2369 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_A2_ADDR 2370 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_A1_ADDR 2371 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B2_ADDR 2372 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B1_ADDR 2373 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B0_ADDR 2374 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_A2_ADDR 2375 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_A1_ADDR 2376 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B2_ADDR 2377 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B1_ADDR 2378 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B0_ADDR 2379 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_A2_ADDR 2380 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_A1_ADDR 2381 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B2_ADDR 2382 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B1_ADDR 2383 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B0_ADDR 2384 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_A2_ADDR 2385 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_A1_ADDR 2386 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B2_ADDR 2387 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B1_ADDR 2388 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B0_ADDR 2389 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_A2_ADDR 2390 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_A1_ADDR 2391 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B2_ADDR 2392 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B1_ADDR 2393 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B0_ADDR 2394 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_A2_ADDR 2395 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_A1_ADDR 2396 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_1_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_2 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_2_COUNT 80 #define MOD_EQ_GEN_FILTER2_2_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B2_ADDR 2397 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B1_ADDR 2398 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B0_ADDR 2399 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_A2_ADDR 2400 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_A1_ADDR 2401 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B2_ADDR 2402 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B1_ADDR 2403 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B0_ADDR 2404 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_A2_ADDR 2405 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_A1_ADDR 2406 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B2_ADDR 2407 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B1_ADDR 2408 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B0_ADDR 2409 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_A2_ADDR 2410 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_A1_ADDR 2411 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B2_ADDR 2412 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B1_ADDR 2413 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B0_ADDR 2414 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_A2_ADDR 2415 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_A1_ADDR 2416 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B2_ADDR 2417 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B1_ADDR 2418 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B0_ADDR 2419 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_A2_ADDR 2420 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_A1_ADDR 2421 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B2_ADDR 2422 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B1_ADDR 2423 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B0_ADDR 2424 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_A2_ADDR 2425 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_A1_ADDR 2426 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B2_ADDR 2427 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B1_ADDR 2428 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B0_ADDR 2429 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_A2_ADDR 2430 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_A1_ADDR 2431 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B2_ADDR 2432 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B1_ADDR 2433 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B0_ADDR 2434 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_A2_ADDR 2435 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_A1_ADDR 2436 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B2_ADDR 2437 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B1_ADDR 2438 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B0_ADDR 2439 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_A2_ADDR 2440 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_A1_ADDR 2441 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B2_ADDR 2442 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B1_ADDR 2443 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B0_ADDR 2444 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_A2_ADDR 2445 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_A1_ADDR 2446 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B2_ADDR 2447 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B1_ADDR 2448 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B0_ADDR 2449 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_A2_ADDR 2450 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_A1_ADDR 2451 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B2_ADDR 2452 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B1_ADDR 2453 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B0_ADDR 2454 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_A2_ADDR 2455 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_A1_ADDR 2456 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B2_ADDR 2457 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B1_ADDR 2458 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B0_ADDR 2459 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_A2_ADDR 2460 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_A1_ADDR 2461 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B2_ADDR 2462 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B1_ADDR 2463 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B0_ADDR 2464 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_A2_ADDR 2465 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_A1_ADDR 2466 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B2_ADDR 2467 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B1_ADDR 2468 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B0_ADDR 2469 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_A2_ADDR 2470 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_A1_ADDR 2471 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B2_ADDR 2472 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B1_ADDR 2473 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B0_ADDR 2474 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_A2_ADDR 2475 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_A1_ADDR 2476 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_2_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_3 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_3_COUNT 80 #define MOD_EQ_GEN_FILTER2_3_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B2_ADDR 2477 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B1_ADDR 2478 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B0_ADDR 2479 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_A2_ADDR 2480 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_A1_ADDR 2481 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B2_ADDR 2482 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B1_ADDR 2483 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B0_ADDR 2484 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_A2_ADDR 2485 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_A1_ADDR 2486 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B2_ADDR 2487 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B1_ADDR 2488 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B0_ADDR 2489 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_A2_ADDR 2490 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_A1_ADDR 2491 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B2_ADDR 2492 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B1_ADDR 2493 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B0_ADDR 2494 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_A2_ADDR 2495 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_A1_ADDR 2496 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B2_ADDR 2497 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B1_ADDR 2498 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B0_ADDR 2499 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_A2_ADDR 2500 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_A1_ADDR 2501 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B2_ADDR 2502 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B1_ADDR 2503 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B0_ADDR 2504 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_A2_ADDR 2505 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_A1_ADDR 2506 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B2_ADDR 2507 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B1_ADDR 2508 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B0_ADDR 2509 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_A2_ADDR 2510 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_A1_ADDR 2511 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B2_ADDR 2512 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B1_ADDR 2513 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B0_ADDR 2514 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_A2_ADDR 2515 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_A1_ADDR 2516 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B2_ADDR 2517 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B1_ADDR 2518 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B0_ADDR 2519 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_A2_ADDR 2520 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_A1_ADDR 2521 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B2_ADDR 2522 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B1_ADDR 2523 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B0_ADDR 2524 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_A2_ADDR 2525 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_A1_ADDR 2526 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B2_ADDR 2527 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B1_ADDR 2528 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B0_ADDR 2529 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_A2_ADDR 2530 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_A1_ADDR 2531 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B2_ADDR 2532 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B1_ADDR 2533 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B0_ADDR 2534 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_A2_ADDR 2535 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_A1_ADDR 2536 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B2_ADDR 2537 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B1_ADDR 2538 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B0_ADDR 2539 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_A2_ADDR 2540 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_A1_ADDR 2541 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B2_ADDR 2542 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B1_ADDR 2543 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B0_ADDR 2544 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_A2_ADDR 2545 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_A1_ADDR 2546 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B2_ADDR 2547 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B1_ADDR 2548 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B0_ADDR 2549 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_A2_ADDR 2550 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_A1_ADDR 2551 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B2_ADDR 2552 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B1_ADDR 2553 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B0_ADDR 2554 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_A2_ADDR 2555 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_A1_ADDR 2556 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_3_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_4 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_4_COUNT 80 #define MOD_EQ_GEN_FILTER2_4_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B2_ADDR 2557 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B1_ADDR 2558 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B0_ADDR 2559 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_A2_ADDR 2560 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_A1_ADDR 2561 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B2_ADDR 2562 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B1_ADDR 2563 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B0_ADDR 2564 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_A2_ADDR 2565 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_A1_ADDR 2566 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B2_ADDR 2567 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B1_ADDR 2568 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B0_ADDR 2569 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_A2_ADDR 2570 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_A1_ADDR 2571 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B2_ADDR 2572 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B1_ADDR 2573 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B0_ADDR 2574 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_A2_ADDR 2575 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_A1_ADDR 2576 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B2_ADDR 2577 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B1_ADDR 2578 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B0_ADDR 2579 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_A2_ADDR 2580 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_A1_ADDR 2581 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B2_ADDR 2582 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B1_ADDR 2583 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B0_ADDR 2584 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_A2_ADDR 2585 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_A1_ADDR 2586 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B2_ADDR 2587 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B1_ADDR 2588 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B0_ADDR 2589 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_A2_ADDR 2590 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_A1_ADDR 2591 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B2_ADDR 2592 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B1_ADDR 2593 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B0_ADDR 2594 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_A2_ADDR 2595 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_A1_ADDR 2596 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B2_ADDR 2597 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B1_ADDR 2598 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B0_ADDR 2599 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_A2_ADDR 2600 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_A1_ADDR 2601 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B2_ADDR 2602 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B1_ADDR 2603 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B0_ADDR 2604 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_A2_ADDR 2605 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_A1_ADDR 2606 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B2_ADDR 2607 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B1_ADDR 2608 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B0_ADDR 2609 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_A2_ADDR 2610 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_A1_ADDR 2611 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B2_ADDR 2612 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B1_ADDR 2613 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B0_ADDR 2614 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_A2_ADDR 2615 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_A1_ADDR 2616 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B2_ADDR 2617 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B1_ADDR 2618 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B0_ADDR 2619 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_A2_ADDR 2620 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_A1_ADDR 2621 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B2_ADDR 2622 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B1_ADDR 2623 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B0_ADDR 2624 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_A2_ADDR 2625 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_A1_ADDR 2626 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B2_ADDR 2627 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B1_ADDR 2628 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B0_ADDR 2629 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_A2_ADDR 2630 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_A1_ADDR 2631 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B2_ADDR 2632 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B1_ADDR 2633 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B0_ADDR 2634 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_A2_ADDR 2635 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_A1_ADDR 2636 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_4_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_5 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_5_COUNT 80 #define MOD_EQ_GEN_FILTER2_5_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B2_ADDR 2637 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B1_ADDR 2638 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B0_ADDR 2639 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_A2_ADDR 2640 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_A1_ADDR 2641 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B2_ADDR 2642 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B1_ADDR 2643 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B0_ADDR 2644 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_A2_ADDR 2645 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_A1_ADDR 2646 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B2_ADDR 2647 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B1_ADDR 2648 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B0_ADDR 2649 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_A2_ADDR 2650 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_A1_ADDR 2651 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B2_ADDR 2652 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B1_ADDR 2653 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B0_ADDR 2654 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_A2_ADDR 2655 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_A1_ADDR 2656 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B2_ADDR 2657 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B1_ADDR 2658 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B0_ADDR 2659 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_A2_ADDR 2660 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_A1_ADDR 2661 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B2_ADDR 2662 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B1_ADDR 2663 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B0_ADDR 2664 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_A2_ADDR 2665 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_A1_ADDR 2666 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B2_ADDR 2667 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B1_ADDR 2668 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B0_ADDR 2669 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_A2_ADDR 2670 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_A1_ADDR 2671 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B2_ADDR 2672 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B1_ADDR 2673 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B0_ADDR 2674 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_A2_ADDR 2675 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_A1_ADDR 2676 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B2_ADDR 2677 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B1_ADDR 2678 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B0_ADDR 2679 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_A2_ADDR 2680 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_A1_ADDR 2681 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B2_ADDR 2682 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B1_ADDR 2683 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B0_ADDR 2684 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_A2_ADDR 2685 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_A1_ADDR 2686 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B2_ADDR 2687 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B1_ADDR 2688 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B0_ADDR 2689 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_A2_ADDR 2690 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_A1_ADDR 2691 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B2_ADDR 2692 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B1_ADDR 2693 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B0_ADDR 2694 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_A2_ADDR 2695 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_A1_ADDR 2696 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B2_ADDR 2697 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B1_ADDR 2698 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B0_ADDR 2699 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_A2_ADDR 2700 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_A1_ADDR 2701 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B2_ADDR 2702 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B1_ADDR 2703 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B0_ADDR 2704 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_A2_ADDR 2705 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_A1_ADDR 2706 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B2_ADDR 2707 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B1_ADDR 2708 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B0_ADDR 2709 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_A2_ADDR 2710 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_A1_ADDR 2711 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B2_ADDR 2712 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B1_ADDR 2713 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B0_ADDR 2714 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_A2_ADDR 2715 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_A1_ADDR 2716 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_5_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_6 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_6_COUNT 80 #define MOD_EQ_GEN_FILTER2_6_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B2_ADDR 2717 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B1_ADDR 2718 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B0_ADDR 2719 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_A2_ADDR 2720 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_A1_ADDR 2721 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B2_ADDR 2722 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B1_ADDR 2723 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B0_ADDR 2724 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_A2_ADDR 2725 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_A1_ADDR 2726 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B2_ADDR 2727 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B1_ADDR 2728 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B0_ADDR 2729 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_A2_ADDR 2730 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_A1_ADDR 2731 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B2_ADDR 2732 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B1_ADDR 2733 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B0_ADDR 2734 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_A2_ADDR 2735 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_A1_ADDR 2736 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B2_ADDR 2737 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B1_ADDR 2738 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B0_ADDR 2739 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_A2_ADDR 2740 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_A1_ADDR 2741 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B2_ADDR 2742 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B1_ADDR 2743 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B0_ADDR 2744 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_A2_ADDR 2745 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_A1_ADDR 2746 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B2_ADDR 2747 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B1_ADDR 2748 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B0_ADDR 2749 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_A2_ADDR 2750 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_A1_ADDR 2751 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B2_ADDR 2752 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B1_ADDR 2753 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B0_ADDR 2754 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_A2_ADDR 2755 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_A1_ADDR 2756 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B2_ADDR 2757 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B1_ADDR 2758 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B0_ADDR 2759 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_A2_ADDR 2760 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_A1_ADDR 2761 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B2_ADDR 2762 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B1_ADDR 2763 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B0_ADDR 2764 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_A2_ADDR 2765 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_A1_ADDR 2766 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B2_ADDR 2767 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B1_ADDR 2768 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B0_ADDR 2769 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_A2_ADDR 2770 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_A1_ADDR 2771 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B2_ADDR 2772 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B1_ADDR 2773 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B0_ADDR 2774 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_A2_ADDR 2775 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_A1_ADDR 2776 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B2_ADDR 2777 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B1_ADDR 2778 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B0_ADDR 2779 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_A2_ADDR 2780 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_A1_ADDR 2781 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B2_ADDR 2782 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B1_ADDR 2783 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B0_ADDR 2784 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_A2_ADDR 2785 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_A1_ADDR 2786 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B2_ADDR 2787 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B1_ADDR 2788 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B0_ADDR 2789 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_A2_ADDR 2790 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_A1_ADDR 2791 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B2_ADDR 2792 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B1_ADDR 2793 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B0_ADDR 2794 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_A2_ADDR 2795 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_A1_ADDR 2796 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_6_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_7 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_7_COUNT 80 #define MOD_EQ_GEN_FILTER2_7_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B2_ADDR 2797 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B1_ADDR 2798 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B0_ADDR 2799 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_A2_ADDR 2800 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_A1_ADDR 2801 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B2_ADDR 2802 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B1_ADDR 2803 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B0_ADDR 2804 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_A2_ADDR 2805 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_A1_ADDR 2806 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B2_ADDR 2807 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B1_ADDR 2808 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B0_ADDR 2809 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_A2_ADDR 2810 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_A1_ADDR 2811 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B2_ADDR 2812 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B1_ADDR 2813 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B0_ADDR 2814 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_A2_ADDR 2815 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_A1_ADDR 2816 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B2_ADDR 2817 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B1_ADDR 2818 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B0_ADDR 2819 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_A2_ADDR 2820 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_A1_ADDR 2821 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B2_ADDR 2822 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B1_ADDR 2823 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B0_ADDR 2824 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_A2_ADDR 2825 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_A1_ADDR 2826 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B2_ADDR 2827 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B1_ADDR 2828 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B0_ADDR 2829 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_A2_ADDR 2830 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_A1_ADDR 2831 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B2_ADDR 2832 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B1_ADDR 2833 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B0_ADDR 2834 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_A2_ADDR 2835 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_A1_ADDR 2836 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B2_ADDR 2837 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B1_ADDR 2838 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B0_ADDR 2839 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_A2_ADDR 2840 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_A1_ADDR 2841 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B2_ADDR 2842 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B1_ADDR 2843 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B0_ADDR 2844 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_A2_ADDR 2845 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_A1_ADDR 2846 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B2_ADDR 2847 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B1_ADDR 2848 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B0_ADDR 2849 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_A2_ADDR 2850 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_A1_ADDR 2851 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B2_ADDR 2852 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B1_ADDR 2853 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B0_ADDR 2854 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_A2_ADDR 2855 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_A1_ADDR 2856 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B2_ADDR 2857 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B1_ADDR 2858 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B0_ADDR 2859 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_A2_ADDR 2860 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_A1_ADDR 2861 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B2_ADDR 2862 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B1_ADDR 2863 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B0_ADDR 2864 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_A2_ADDR 2865 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_A1_ADDR 2866 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B2_ADDR 2867 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B1_ADDR 2868 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B0_ADDR 2869 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_A2_ADDR 2870 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_A1_ADDR 2871 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B2_ADDR 2872 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B1_ADDR 2873 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B0_ADDR 2874 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_A2_ADDR 2875 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_A1_ADDR 2876 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_7_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_8 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_8_COUNT 80 #define MOD_EQ_GEN_FILTER2_8_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B2_ADDR 2877 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B1_ADDR 2878 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B0_ADDR 2879 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_A2_ADDR 2880 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_A1_ADDR 2881 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B2_ADDR 2882 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B1_ADDR 2883 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B0_ADDR 2884 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_A2_ADDR 2885 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_A1_ADDR 2886 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B2_ADDR 2887 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B1_ADDR 2888 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B0_ADDR 2889 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_A2_ADDR 2890 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_A1_ADDR 2891 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B2_ADDR 2892 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B1_ADDR 2893 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B0_ADDR 2894 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_A2_ADDR 2895 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_A1_ADDR 2896 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B2_ADDR 2897 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B1_ADDR 2898 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B0_ADDR 2899 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_A2_ADDR 2900 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_A1_ADDR 2901 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B2_ADDR 2902 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B1_ADDR 2903 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B0_ADDR 2904 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_A2_ADDR 2905 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_A1_ADDR 2906 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B2_ADDR 2907 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B1_ADDR 2908 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B0_ADDR 2909 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_A2_ADDR 2910 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_A1_ADDR 2911 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B2_ADDR 2912 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B1_ADDR 2913 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B0_ADDR 2914 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_A2_ADDR 2915 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_A1_ADDR 2916 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B2_ADDR 2917 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B1_ADDR 2918 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B0_ADDR 2919 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_A2_ADDR 2920 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_A1_ADDR 2921 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B2_ADDR 2922 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B1_ADDR 2923 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B0_ADDR 2924 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_A2_ADDR 2925 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_A1_ADDR 2926 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B2_ADDR 2927 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B1_ADDR 2928 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B0_ADDR 2929 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_A2_ADDR 2930 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_A1_ADDR 2931 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B2_ADDR 2932 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B1_ADDR 2933 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B0_ADDR 2934 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_A2_ADDR 2935 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_A1_ADDR 2936 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B2_ADDR 2937 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B1_ADDR 2938 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B0_ADDR 2939 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_A2_ADDR 2940 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_A1_ADDR 2941 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B2_ADDR 2942 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B1_ADDR 2943 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B0_ADDR 2944 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_A2_ADDR 2945 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_A1_ADDR 2946 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B2_ADDR 2947 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B1_ADDR 2948 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B0_ADDR 2949 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_A2_ADDR 2950 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_A1_ADDR 2951 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B2_ADDR 2952 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B1_ADDR 2953 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B0_ADDR 2954 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_A2_ADDR 2955 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_A1_ADDR 2956 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_8_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_9 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_9_COUNT 80 #define MOD_EQ_GEN_FILTER2_9_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B2_ADDR 2957 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B1_ADDR 2958 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B0_ADDR 2959 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_A2_ADDR 2960 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_A1_ADDR 2961 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B2_ADDR 2962 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B1_ADDR 2963 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B0_ADDR 2964 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_A2_ADDR 2965 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_A1_ADDR 2966 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B2_ADDR 2967 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B1_ADDR 2968 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B0_ADDR 2969 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_A2_ADDR 2970 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_A1_ADDR 2971 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B2_ADDR 2972 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B1_ADDR 2973 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B0_ADDR 2974 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_A2_ADDR 2975 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_A1_ADDR 2976 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B2_ADDR 2977 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B1_ADDR 2978 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B0_ADDR 2979 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_A2_ADDR 2980 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_A1_ADDR 2981 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B2_ADDR 2982 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B1_ADDR 2983 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B0_ADDR 2984 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_A2_ADDR 2985 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_A1_ADDR 2986 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B2_ADDR 2987 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B1_ADDR 2988 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B0_ADDR 2989 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_A2_ADDR 2990 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_A1_ADDR 2991 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B2_ADDR 2992 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B1_ADDR 2993 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B0_ADDR 2994 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_A2_ADDR 2995 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_A1_ADDR 2996 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B2_ADDR 2997 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B1_ADDR 2998 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B0_ADDR 2999 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_A2_ADDR 3000 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_A1_ADDR 3001 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B2_ADDR 3002 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B1_ADDR 3003 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B0_ADDR 3004 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_A2_ADDR 3005 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_A1_ADDR 3006 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B2_ADDR 3007 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B1_ADDR 3008 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B0_ADDR 3009 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_A2_ADDR 3010 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_A1_ADDR 3011 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B2_ADDR 3012 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B1_ADDR 3013 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B0_ADDR 3014 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_A2_ADDR 3015 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_A1_ADDR 3016 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B2_ADDR 3017 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B1_ADDR 3018 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B0_ADDR 3019 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_A2_ADDR 3020 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_A1_ADDR 3021 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B2_ADDR 3022 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B1_ADDR 3023 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B0_ADDR 3024 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_A2_ADDR 3025 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_A1_ADDR 3026 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B2_ADDR 3027 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B1_ADDR 3028 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B0_ADDR 3029 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_A2_ADDR 3030 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_A1_ADDR 3031 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B2_ADDR 3032 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B1_ADDR 3033 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B0_ADDR 3034 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_A2_ADDR 3035 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_A1_ADDR 3036 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_9_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_10 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_10_COUNT 80 #define MOD_EQ_GEN_FILTER2_10_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B2_ADDR 3037 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B1_ADDR 3038 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B0_ADDR 3039 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_A2_ADDR 3040 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_A1_ADDR 3041 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B2_ADDR 3042 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B1_ADDR 3043 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B0_ADDR 3044 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_A2_ADDR 3045 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_A1_ADDR 3046 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B2_ADDR 3047 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B1_ADDR 3048 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B0_ADDR 3049 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_A2_ADDR 3050 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_A1_ADDR 3051 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B2_ADDR 3052 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B1_ADDR 3053 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B0_ADDR 3054 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_A2_ADDR 3055 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_A1_ADDR 3056 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B2_ADDR 3057 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B1_ADDR 3058 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B0_ADDR 3059 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_A2_ADDR 3060 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_A1_ADDR 3061 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B2_ADDR 3062 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B1_ADDR 3063 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B0_ADDR 3064 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_A2_ADDR 3065 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_A1_ADDR 3066 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B2_ADDR 3067 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B1_ADDR 3068 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B0_ADDR 3069 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_A2_ADDR 3070 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_A1_ADDR 3071 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B2_ADDR 3072 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B1_ADDR 3073 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B0_ADDR 3074 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_A2_ADDR 3075 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_A1_ADDR 3076 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B2_ADDR 3077 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B1_ADDR 3078 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B0_ADDR 3079 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_A2_ADDR 3080 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_A1_ADDR 3081 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B2_ADDR 3082 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B1_ADDR 3083 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B0_ADDR 3084 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_A2_ADDR 3085 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_A1_ADDR 3086 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B2_ADDR 3087 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B1_ADDR 3088 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B0_ADDR 3089 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_A2_ADDR 3090 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_A1_ADDR 3091 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B2_ADDR 3092 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B1_ADDR 3093 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B0_ADDR 3094 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_A2_ADDR 3095 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_A1_ADDR 3096 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B2_ADDR 3097 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B1_ADDR 3098 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B0_ADDR 3099 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_A2_ADDR 3100 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_A1_ADDR 3101 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B2_ADDR 3102 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B1_ADDR 3103 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B0_ADDR 3104 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_A2_ADDR 3105 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_A1_ADDR 3106 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B2_ADDR 3107 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B1_ADDR 3108 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B0_ADDR 3109 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_A2_ADDR 3110 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_A1_ADDR 3111 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B2_ADDR 3112 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B1_ADDR 3113 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B0_ADDR 3114 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_A2_ADDR 3115 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_A1_ADDR 3116 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_10_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_11 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_11_COUNT 80 #define MOD_EQ_GEN_FILTER2_11_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B2_ADDR 3117 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B1_ADDR 3118 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B0_ADDR 3119 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_A2_ADDR 3120 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_A1_ADDR 3121 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B2_ADDR 3122 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B1_ADDR 3123 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B0_ADDR 3124 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_A2_ADDR 3125 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_A1_ADDR 3126 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B2_ADDR 3127 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B1_ADDR 3128 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B0_ADDR 3129 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_A2_ADDR 3130 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_A1_ADDR 3131 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B2_ADDR 3132 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B1_ADDR 3133 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B0_ADDR 3134 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_A2_ADDR 3135 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_A1_ADDR 3136 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B2_ADDR 3137 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B1_ADDR 3138 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B0_ADDR 3139 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_A2_ADDR 3140 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_A1_ADDR 3141 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B2_ADDR 3142 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B1_ADDR 3143 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B0_ADDR 3144 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_A2_ADDR 3145 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_A1_ADDR 3146 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B2_ADDR 3147 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B1_ADDR 3148 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B0_ADDR 3149 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_A2_ADDR 3150 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_A1_ADDR 3151 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B2_ADDR 3152 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B1_ADDR 3153 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B0_ADDR 3154 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_A2_ADDR 3155 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_A1_ADDR 3156 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B2_ADDR 3157 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B1_ADDR 3158 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B0_ADDR 3159 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_A2_ADDR 3160 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_A1_ADDR 3161 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B2_ADDR 3162 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B1_ADDR 3163 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B0_ADDR 3164 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_A2_ADDR 3165 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_A1_ADDR 3166 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B2_ADDR 3167 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B1_ADDR 3168 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B0_ADDR 3169 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_A2_ADDR 3170 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_A1_ADDR 3171 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B2_ADDR 3172 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B1_ADDR 3173 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B0_ADDR 3174 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_A2_ADDR 3175 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_A1_ADDR 3176 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B2_ADDR 3177 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B1_ADDR 3178 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B0_ADDR 3179 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_A2_ADDR 3180 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_A1_ADDR 3181 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B2_ADDR 3182 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B1_ADDR 3183 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B0_ADDR 3184 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_A2_ADDR 3185 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_A1_ADDR 3186 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B2_ADDR 3187 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B1_ADDR 3188 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B0_ADDR 3189 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_A2_ADDR 3190 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_A1_ADDR 3191 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B2_ADDR 3192 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B1_ADDR 3193 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B0_ADDR 3194 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_A2_ADDR 3195 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_A1_ADDR 3196 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_11_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_12 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_12_COUNT 80 #define MOD_EQ_GEN_FILTER2_12_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B2_ADDR 3197 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B1_ADDR 3198 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B0_ADDR 3199 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_A2_ADDR 3200 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_A1_ADDR 3201 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B2_ADDR 3202 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B1_ADDR 3203 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B0_ADDR 3204 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_A2_ADDR 3205 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_A1_ADDR 3206 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B2_ADDR 3207 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B1_ADDR 3208 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B0_ADDR 3209 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_A2_ADDR 3210 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_A1_ADDR 3211 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B2_ADDR 3212 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B1_ADDR 3213 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B0_ADDR 3214 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_A2_ADDR 3215 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_A1_ADDR 3216 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B2_ADDR 3217 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B1_ADDR 3218 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B0_ADDR 3219 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_A2_ADDR 3220 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_A1_ADDR 3221 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B2_ADDR 3222 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B1_ADDR 3223 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B0_ADDR 3224 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_A2_ADDR 3225 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_A1_ADDR 3226 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B2_ADDR 3227 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B1_ADDR 3228 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B0_ADDR 3229 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_A2_ADDR 3230 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_A1_ADDR 3231 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B2_ADDR 3232 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B1_ADDR 3233 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B0_ADDR 3234 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_A2_ADDR 3235 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_A1_ADDR 3236 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B2_ADDR 3237 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B1_ADDR 3238 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B0_ADDR 3239 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_A2_ADDR 3240 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_A1_ADDR 3241 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B2_ADDR 3242 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B1_ADDR 3243 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B0_ADDR 3244 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_A2_ADDR 3245 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_A1_ADDR 3246 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B2_ADDR 3247 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B1_ADDR 3248 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B0_ADDR 3249 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_A2_ADDR 3250 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_A1_ADDR 3251 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B2_ADDR 3252 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B1_ADDR 3253 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B0_ADDR 3254 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_A2_ADDR 3255 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_A1_ADDR 3256 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B2_ADDR 3257 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B1_ADDR 3258 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B0_ADDR 3259 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_A2_ADDR 3260 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_A1_ADDR 3261 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B2_ADDR 3262 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B1_ADDR 3263 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B0_ADDR 3264 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_A2_ADDR 3265 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_A1_ADDR 3266 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B2_ADDR 3267 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B1_ADDR 3268 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B0_ADDR 3269 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_A2_ADDR 3270 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_A1_ADDR 3271 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B2_ADDR 3272 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B1_ADDR 3273 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B0_ADDR 3274 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_A2_ADDR 3275 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_A1_ADDR 3276 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_12_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_13 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_13_COUNT 80 #define MOD_EQ_GEN_FILTER2_13_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B2_ADDR 3277 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B1_ADDR 3278 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B0_ADDR 3279 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_A2_ADDR 3280 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_A1_ADDR 3281 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B2_ADDR 3282 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B1_ADDR 3283 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B0_ADDR 3284 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_A2_ADDR 3285 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_A1_ADDR 3286 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B2_ADDR 3287 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B1_ADDR 3288 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B0_ADDR 3289 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_A2_ADDR 3290 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_A1_ADDR 3291 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B2_ADDR 3292 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B1_ADDR 3293 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B0_ADDR 3294 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_A2_ADDR 3295 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_A1_ADDR 3296 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B2_ADDR 3297 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B1_ADDR 3298 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B0_ADDR 3299 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_A2_ADDR 3300 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_A1_ADDR 3301 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B2_ADDR 3302 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B1_ADDR 3303 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B0_ADDR 3304 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_A2_ADDR 3305 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_A1_ADDR 3306 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B2_ADDR 3307 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B1_ADDR 3308 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B0_ADDR 3309 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_A2_ADDR 3310 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_A1_ADDR 3311 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B2_ADDR 3312 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B1_ADDR 3313 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B0_ADDR 3314 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_A2_ADDR 3315 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_A1_ADDR 3316 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B2_ADDR 3317 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B1_ADDR 3318 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B0_ADDR 3319 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_A2_ADDR 3320 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_A1_ADDR 3321 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B2_ADDR 3322 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B1_ADDR 3323 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B0_ADDR 3324 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_A2_ADDR 3325 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_A1_ADDR 3326 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B2_ADDR 3327 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B1_ADDR 3328 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B0_ADDR 3329 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_A2_ADDR 3330 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_A1_ADDR 3331 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B2_ADDR 3332 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B1_ADDR 3333 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B0_ADDR 3334 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_A2_ADDR 3335 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_A1_ADDR 3336 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B2_ADDR 3337 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B1_ADDR 3338 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B0_ADDR 3339 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_A2_ADDR 3340 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_A1_ADDR 3341 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B2_ADDR 3342 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B1_ADDR 3343 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B0_ADDR 3344 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_A2_ADDR 3345 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_A1_ADDR 3346 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B2_ADDR 3347 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B1_ADDR 3348 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B0_ADDR 3349 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_A2_ADDR 3350 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_A1_ADDR 3351 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B2_ADDR 3352 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B1_ADDR 3353 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B0_ADDR 3354 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_A2_ADDR 3355 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_A1_ADDR 3356 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_13_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_14 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_14_COUNT 80 #define MOD_EQ_GEN_FILTER2_14_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B2_ADDR 3357 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B1_ADDR 3358 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B0_ADDR 3359 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_A2_ADDR 3360 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_A1_ADDR 3361 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B2_ADDR 3362 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B1_ADDR 3363 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B0_ADDR 3364 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_A2_ADDR 3365 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_A1_ADDR 3366 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B2_ADDR 3367 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B1_ADDR 3368 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B0_ADDR 3369 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_A2_ADDR 3370 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_A1_ADDR 3371 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B2_ADDR 3372 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B1_ADDR 3373 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B0_ADDR 3374 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_A2_ADDR 3375 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_A1_ADDR 3376 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B2_ADDR 3377 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B1_ADDR 3378 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B0_ADDR 3379 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_A2_ADDR 3380 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_A1_ADDR 3381 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B2_ADDR 3382 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B1_ADDR 3383 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B0_ADDR 3384 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_A2_ADDR 3385 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_A1_ADDR 3386 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B2_ADDR 3387 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B1_ADDR 3388 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B0_ADDR 3389 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_A2_ADDR 3390 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_A1_ADDR 3391 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B2_ADDR 3392 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B1_ADDR 3393 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B0_ADDR 3394 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_A2_ADDR 3395 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_A1_ADDR 3396 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B2_ADDR 3397 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B1_ADDR 3398 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B0_ADDR 3399 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_A2_ADDR 3400 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_A1_ADDR 3401 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B2_ADDR 3402 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B1_ADDR 3403 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B0_ADDR 3404 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_A2_ADDR 3405 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_A1_ADDR 3406 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B2_ADDR 3407 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B1_ADDR 3408 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B0_ADDR 3409 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_A2_ADDR 3410 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_A1_ADDR 3411 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B2_ADDR 3412 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B1_ADDR 3413 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B0_ADDR 3414 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_A2_ADDR 3415 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_A1_ADDR 3416 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B2_ADDR 3417 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B1_ADDR 3418 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B0_ADDR 3419 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_A2_ADDR 3420 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_A1_ADDR 3421 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B2_ADDR 3422 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B1_ADDR 3423 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B0_ADDR 3424 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_A2_ADDR 3425 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_A1_ADDR 3426 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B2_ADDR 3427 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B1_ADDR 3428 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B0_ADDR 3429 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_A2_ADDR 3430 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_A1_ADDR 3431 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B2_ADDR 3432 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B1_ADDR 3433 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B0_ADDR 3434 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_A2_ADDR 3435 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_A1_ADDR 3436 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_14_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_15 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_15_COUNT 80 #define MOD_EQ_GEN_FILTER2_15_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B2_ADDR 3437 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B1_ADDR 3438 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B0_ADDR 3439 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_A2_ADDR 3440 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_A1_ADDR 3441 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B2_ADDR 3442 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B1_ADDR 3443 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B0_ADDR 3444 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_A2_ADDR 3445 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_A1_ADDR 3446 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B2_ADDR 3447 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B1_ADDR 3448 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B0_ADDR 3449 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_A2_ADDR 3450 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_A1_ADDR 3451 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B2_ADDR 3452 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B1_ADDR 3453 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B0_ADDR 3454 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_A2_ADDR 3455 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_A1_ADDR 3456 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B2_ADDR 3457 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B1_ADDR 3458 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B0_ADDR 3459 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_A2_ADDR 3460 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_A1_ADDR 3461 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B2_ADDR 3462 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B1_ADDR 3463 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B0_ADDR 3464 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_A2_ADDR 3465 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_A1_ADDR 3466 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B2_ADDR 3467 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B1_ADDR 3468 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B0_ADDR 3469 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_A2_ADDR 3470 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_A1_ADDR 3471 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B2_ADDR 3472 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B1_ADDR 3473 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B0_ADDR 3474 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_A2_ADDR 3475 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_A1_ADDR 3476 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B2_ADDR 3477 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B1_ADDR 3478 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B0_ADDR 3479 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_A2_ADDR 3480 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_A1_ADDR 3481 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B2_ADDR 3482 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B1_ADDR 3483 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B0_ADDR 3484 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_A2_ADDR 3485 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_A1_ADDR 3486 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B2_ADDR 3487 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B1_ADDR 3488 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B0_ADDR 3489 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_A2_ADDR 3490 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_A1_ADDR 3491 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B2_ADDR 3492 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B1_ADDR 3493 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B0_ADDR 3494 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_A2_ADDR 3495 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_A1_ADDR 3496 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B2_ADDR 3497 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B1_ADDR 3498 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B0_ADDR 3499 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_A2_ADDR 3500 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_A1_ADDR 3501 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B2_ADDR 3502 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B1_ADDR 3503 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B0_ADDR 3504 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_A2_ADDR 3505 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_A1_ADDR 3506 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B2_ADDR 3507 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B1_ADDR 3508 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B0_ADDR 3509 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_A2_ADDR 3510 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_A1_ADDR 3511 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B2_ADDR 3512 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B1_ADDR 3513 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B0_ADDR 3514 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_A2_ADDR 3515 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_A1_ADDR 3516 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_15_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter2_16 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER2_16_COUNT 80 #define MOD_EQ_GEN_FILTER2_16_DEVICE "IC1" #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B2_ADDR 3517 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B1_ADDR 3518 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B0_ADDR 3519 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_A2_ADDR 3520 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_A1_ADDR 3521 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B2_ADDR 3522 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B1_ADDR 3523 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B0_ADDR 3524 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_A2_ADDR 3525 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_A1_ADDR 3526 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B2_ADDR 3527 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B1_ADDR 3528 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B0_ADDR 3529 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_A2_ADDR 3530 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_A1_ADDR 3531 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B2_ADDR 3532 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B1_ADDR 3533 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B0_ADDR 3534 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_A2_ADDR 3535 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_A1_ADDR 3536 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B2_ADDR 3537 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B1_ADDR 3538 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B0_ADDR 3539 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_A2_ADDR 3540 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_A1_ADDR 3541 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B2_ADDR 3542 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B1_ADDR 3543 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B0_ADDR 3544 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_A2_ADDR 3545 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_A1_ADDR 3546 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B2_ADDR 3547 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B1_ADDR 3548 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B0_ADDR 3549 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_A2_ADDR 3550 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_A1_ADDR 3551 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B2_ADDR 3552 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B1_ADDR 3553 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B0_ADDR 3554 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_A2_ADDR 3555 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_A1_ADDR 3556 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B2_ADDR 3557 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B1_ADDR 3558 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B0_ADDR 3559 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_A2_ADDR 3560 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_A1_ADDR 3561 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B2_ADDR 3562 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B1_ADDR 3563 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B0_ADDR 3564 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_A2_ADDR 3565 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_A1_ADDR 3566 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B2_ADDR 3567 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B1_ADDR 3568 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B0_ADDR 3569 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_A2_ADDR 3570 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_A1_ADDR 3571 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B2_ADDR 3572 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B1_ADDR 3573 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B0_ADDR 3574 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_A2_ADDR 3575 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_A1_ADDR 3576 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B2_ADDR 3577 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B1_ADDR 3578 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B0_ADDR 3579 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_A2_ADDR 3580 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_A1_ADDR 3581 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B2_ADDR 3582 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B1_ADDR 3583 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B0_ADDR 3584 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_A2_ADDR 3585 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_A1_ADDR 3586 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B2_ADDR 3587 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B1_ADDR 3588 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B0_ADDR 3589 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_A2_ADDR 3590 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_A1_ADDR 3591 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B2_ADDR 3592 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B1_ADDR 3593 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B0_ADDR 3594 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_A2_ADDR 3595 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_A1_ADDR 3596 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER2_16_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_1 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_1_COUNT 80 #define MOD_EQ_GEN_FILTER3_1_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B2_ADDR 3597 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B1_ADDR 3598 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B0_ADDR 3599 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_A2_ADDR 3600 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_A1_ADDR 3601 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B2_ADDR 3602 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B1_ADDR 3603 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B0_ADDR 3604 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_A2_ADDR 3605 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_A1_ADDR 3606 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B2_ADDR 3607 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B1_ADDR 3608 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B0_ADDR 3609 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_A2_ADDR 3610 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_A1_ADDR 3611 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B2_ADDR 3612 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B1_ADDR 3613 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B0_ADDR 3614 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_A2_ADDR 3615 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_A1_ADDR 3616 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B2_ADDR 3617 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B1_ADDR 3618 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B0_ADDR 3619 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_A2_ADDR 3620 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_A1_ADDR 3621 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B2_ADDR 3622 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B1_ADDR 3623 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B0_ADDR 3624 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_A2_ADDR 3625 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_A1_ADDR 3626 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B2_ADDR 3627 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B1_ADDR 3628 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B0_ADDR 3629 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_A2_ADDR 3630 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_A1_ADDR 3631 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B2_ADDR 3632 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B1_ADDR 3633 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B0_ADDR 3634 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_A2_ADDR 3635 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_A1_ADDR 3636 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B2_ADDR 3637 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B1_ADDR 3638 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B0_ADDR 3639 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_A2_ADDR 3640 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_A1_ADDR 3641 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B2_ADDR 3642 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B1_ADDR 3643 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B0_ADDR 3644 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_A2_ADDR 3645 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_A1_ADDR 3646 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B2_ADDR 3647 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B1_ADDR 3648 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B0_ADDR 3649 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_A2_ADDR 3650 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_A1_ADDR 3651 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B2_ADDR 3652 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B1_ADDR 3653 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B0_ADDR 3654 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_A2_ADDR 3655 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_A1_ADDR 3656 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B2_ADDR 3657 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B1_ADDR 3658 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B0_ADDR 3659 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_A2_ADDR 3660 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_A1_ADDR 3661 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B2_ADDR 3662 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B1_ADDR 3663 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B0_ADDR 3664 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_A2_ADDR 3665 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_A1_ADDR 3666 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B2_ADDR 3667 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B1_ADDR 3668 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B0_ADDR 3669 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_A2_ADDR 3670 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_A1_ADDR 3671 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B2_ADDR 3672 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B1_ADDR 3673 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B0_ADDR 3674 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_A2_ADDR 3675 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_A1_ADDR 3676 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_1_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_2 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_2_COUNT 80 #define MOD_EQ_GEN_FILTER3_2_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B2_ADDR 3677 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B1_ADDR 3678 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B0_ADDR 3679 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_A2_ADDR 3680 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_A1_ADDR 3681 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B2_ADDR 3682 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B1_ADDR 3683 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B0_ADDR 3684 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_A2_ADDR 3685 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_A1_ADDR 3686 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B2_ADDR 3687 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B1_ADDR 3688 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B0_ADDR 3689 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_A2_ADDR 3690 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_A1_ADDR 3691 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B2_ADDR 3692 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B1_ADDR 3693 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B0_ADDR 3694 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_A2_ADDR 3695 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_A1_ADDR 3696 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B2_ADDR 3697 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B1_ADDR 3698 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B0_ADDR 3699 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_A2_ADDR 3700 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_A1_ADDR 3701 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B2_ADDR 3702 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B1_ADDR 3703 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B0_ADDR 3704 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_A2_ADDR 3705 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_A1_ADDR 3706 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B2_ADDR 3707 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B1_ADDR 3708 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B0_ADDR 3709 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_A2_ADDR 3710 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_A1_ADDR 3711 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B2_ADDR 3712 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B1_ADDR 3713 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B0_ADDR 3714 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_A2_ADDR 3715 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_A1_ADDR 3716 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B2_ADDR 3717 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B1_ADDR 3718 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B0_ADDR 3719 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_A2_ADDR 3720 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_A1_ADDR 3721 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B2_ADDR 3722 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B1_ADDR 3723 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B0_ADDR 3724 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_A2_ADDR 3725 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_A1_ADDR 3726 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B2_ADDR 3727 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B1_ADDR 3728 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B0_ADDR 3729 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_A2_ADDR 3730 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_A1_ADDR 3731 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B2_ADDR 3732 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B1_ADDR 3733 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B0_ADDR 3734 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_A2_ADDR 3735 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_A1_ADDR 3736 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B2_ADDR 3737 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B1_ADDR 3738 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B0_ADDR 3739 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_A2_ADDR 3740 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_A1_ADDR 3741 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B2_ADDR 3742 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B1_ADDR 3743 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B0_ADDR 3744 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_A2_ADDR 3745 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_A1_ADDR 3746 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B2_ADDR 3747 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B1_ADDR 3748 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B0_ADDR 3749 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_A2_ADDR 3750 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_A1_ADDR 3751 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B2_ADDR 3752 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B1_ADDR 3753 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B0_ADDR 3754 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_A2_ADDR 3755 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_A1_ADDR 3756 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_2_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_3 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_3_COUNT 80 #define MOD_EQ_GEN_FILTER3_3_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B2_ADDR 3757 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B1_ADDR 3758 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B0_ADDR 3759 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_A2_ADDR 3760 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_A1_ADDR 3761 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B2_ADDR 3762 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B1_ADDR 3763 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B0_ADDR 3764 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_A2_ADDR 3765 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_A1_ADDR 3766 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B2_ADDR 3767 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B1_ADDR 3768 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B0_ADDR 3769 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_A2_ADDR 3770 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_A1_ADDR 3771 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B2_ADDR 3772 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B1_ADDR 3773 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B0_ADDR 3774 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_A2_ADDR 3775 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_A1_ADDR 3776 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B2_ADDR 3777 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B1_ADDR 3778 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B0_ADDR 3779 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_A2_ADDR 3780 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_A1_ADDR 3781 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B2_ADDR 3782 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B1_ADDR 3783 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B0_ADDR 3784 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_A2_ADDR 3785 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_A1_ADDR 3786 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B2_ADDR 3787 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B1_ADDR 3788 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B0_ADDR 3789 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_A2_ADDR 3790 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_A1_ADDR 3791 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B2_ADDR 3792 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B1_ADDR 3793 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B0_ADDR 3794 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_A2_ADDR 3795 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_A1_ADDR 3796 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B2_ADDR 3797 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B1_ADDR 3798 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B0_ADDR 3799 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_A2_ADDR 3800 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_A1_ADDR 3801 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B2_ADDR 3802 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B1_ADDR 3803 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B0_ADDR 3804 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_A2_ADDR 3805 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_A1_ADDR 3806 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B2_ADDR 3807 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B1_ADDR 3808 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B0_ADDR 3809 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_A2_ADDR 3810 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_A1_ADDR 3811 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B2_ADDR 3812 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B1_ADDR 3813 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B0_ADDR 3814 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_A2_ADDR 3815 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_A1_ADDR 3816 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B2_ADDR 3817 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B1_ADDR 3818 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B0_ADDR 3819 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_A2_ADDR 3820 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_A1_ADDR 3821 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B2_ADDR 3822 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B1_ADDR 3823 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B0_ADDR 3824 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_A2_ADDR 3825 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_A1_ADDR 3826 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B2_ADDR 3827 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B1_ADDR 3828 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B0_ADDR 3829 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_A2_ADDR 3830 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_A1_ADDR 3831 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B2_ADDR 3832 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B1_ADDR 3833 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B0_ADDR 3834 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_A2_ADDR 3835 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_A1_ADDR 3836 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_3_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_4 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_4_COUNT 80 #define MOD_EQ_GEN_FILTER3_4_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B2_ADDR 3837 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B1_ADDR 3838 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B0_ADDR 3839 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_A2_ADDR 3840 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_A1_ADDR 3841 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B2_ADDR 3842 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B1_ADDR 3843 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B0_ADDR 3844 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_A2_ADDR 3845 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_A1_ADDR 3846 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B2_ADDR 3847 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B1_ADDR 3848 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B0_ADDR 3849 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_A2_ADDR 3850 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_A1_ADDR 3851 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B2_ADDR 3852 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B1_ADDR 3853 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B0_ADDR 3854 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_A2_ADDR 3855 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_A1_ADDR 3856 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B2_ADDR 3857 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B1_ADDR 3858 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B0_ADDR 3859 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_A2_ADDR 3860 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_A1_ADDR 3861 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B2_ADDR 3862 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B1_ADDR 3863 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B0_ADDR 3864 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_A2_ADDR 3865 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_A1_ADDR 3866 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B2_ADDR 3867 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B1_ADDR 3868 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B0_ADDR 3869 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_A2_ADDR 3870 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_A1_ADDR 3871 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B2_ADDR 3872 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B1_ADDR 3873 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B0_ADDR 3874 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_A2_ADDR 3875 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_A1_ADDR 3876 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B2_ADDR 3877 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B1_ADDR 3878 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B0_ADDR 3879 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_A2_ADDR 3880 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_A1_ADDR 3881 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B2_ADDR 3882 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B1_ADDR 3883 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B0_ADDR 3884 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_A2_ADDR 3885 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_A1_ADDR 3886 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B2_ADDR 3887 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B1_ADDR 3888 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B0_ADDR 3889 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_A2_ADDR 3890 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_A1_ADDR 3891 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B2_ADDR 3892 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B1_ADDR 3893 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B0_ADDR 3894 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_A2_ADDR 3895 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_A1_ADDR 3896 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B2_ADDR 3897 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B1_ADDR 3898 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B0_ADDR 3899 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_A2_ADDR 3900 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_A1_ADDR 3901 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B2_ADDR 3902 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B1_ADDR 3903 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B0_ADDR 3904 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_A2_ADDR 3905 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_A1_ADDR 3906 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B2_ADDR 3907 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B1_ADDR 3908 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B0_ADDR 3909 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_A2_ADDR 3910 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_A1_ADDR 3911 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B2_ADDR 3912 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B1_ADDR 3913 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B0_ADDR 3914 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_A2_ADDR 3915 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_A1_ADDR 3916 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_4_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_5 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_5_COUNT 80 #define MOD_EQ_GEN_FILTER3_5_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B2_ADDR 3917 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B1_ADDR 3918 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B0_ADDR 3919 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_A2_ADDR 3920 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_A1_ADDR 3921 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B2_ADDR 3922 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B1_ADDR 3923 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B0_ADDR 3924 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_A2_ADDR 3925 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_A1_ADDR 3926 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B2_ADDR 3927 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B1_ADDR 3928 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B0_ADDR 3929 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_A2_ADDR 3930 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_A1_ADDR 3931 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B2_ADDR 3932 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B1_ADDR 3933 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B0_ADDR 3934 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_A2_ADDR 3935 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_A1_ADDR 3936 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B2_ADDR 3937 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B1_ADDR 3938 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B0_ADDR 3939 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_A2_ADDR 3940 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_A1_ADDR 3941 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B2_ADDR 3942 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B1_ADDR 3943 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B0_ADDR 3944 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_A2_ADDR 3945 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_A1_ADDR 3946 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B2_ADDR 3947 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B1_ADDR 3948 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B0_ADDR 3949 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_A2_ADDR 3950 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_A1_ADDR 3951 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B2_ADDR 3952 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B1_ADDR 3953 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B0_ADDR 3954 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_A2_ADDR 3955 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_A1_ADDR 3956 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B2_ADDR 3957 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B1_ADDR 3958 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B0_ADDR 3959 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_A2_ADDR 3960 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_A1_ADDR 3961 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B2_ADDR 3962 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B1_ADDR 3963 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B0_ADDR 3964 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_A2_ADDR 3965 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_A1_ADDR 3966 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B2_ADDR 3967 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B1_ADDR 3968 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B0_ADDR 3969 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_A2_ADDR 3970 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_A1_ADDR 3971 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B2_ADDR 3972 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B1_ADDR 3973 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B0_ADDR 3974 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_A2_ADDR 3975 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_A1_ADDR 3976 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B2_ADDR 3977 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B1_ADDR 3978 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B0_ADDR 3979 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_A2_ADDR 3980 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_A1_ADDR 3981 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B2_ADDR 3982 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B1_ADDR 3983 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B0_ADDR 3984 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_A2_ADDR 3985 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_A1_ADDR 3986 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B2_ADDR 3987 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B1_ADDR 3988 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B0_ADDR 3989 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_A2_ADDR 3990 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_A1_ADDR 3991 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B2_ADDR 3992 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B1_ADDR 3993 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B0_ADDR 3994 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_A2_ADDR 3995 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_A1_ADDR 3996 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_5_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_6 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_6_COUNT 80 #define MOD_EQ_GEN_FILTER3_6_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B2_ADDR 3997 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B1_ADDR 3998 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B0_ADDR 3999 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_A2_ADDR 4000 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_A1_ADDR 4001 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B2_ADDR 4002 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B1_ADDR 4003 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B0_ADDR 4004 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_A2_ADDR 4005 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_A1_ADDR 4006 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B2_ADDR 4007 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B1_ADDR 4008 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B0_ADDR 4009 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_A2_ADDR 4010 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_A1_ADDR 4011 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B2_ADDR 4012 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B1_ADDR 4013 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B0_ADDR 4014 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_A2_ADDR 4015 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_A1_ADDR 4016 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B2_ADDR 4017 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B1_ADDR 4018 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B0_ADDR 4019 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_A2_ADDR 4020 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_A1_ADDR 4021 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B2_ADDR 4022 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B1_ADDR 4023 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B0_ADDR 4024 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_A2_ADDR 4025 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_A1_ADDR 4026 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B2_ADDR 4027 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B1_ADDR 4028 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B0_ADDR 4029 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_A2_ADDR 4030 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_A1_ADDR 4031 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B2_ADDR 4032 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B1_ADDR 4033 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B0_ADDR 4034 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_A2_ADDR 4035 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_A1_ADDR 4036 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B2_ADDR 4037 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B1_ADDR 4038 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B0_ADDR 4039 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_A2_ADDR 4040 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_A1_ADDR 4041 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B2_ADDR 4042 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B1_ADDR 4043 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B0_ADDR 4044 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_A2_ADDR 4045 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_A1_ADDR 4046 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B2_ADDR 4047 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B1_ADDR 4048 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B0_ADDR 4049 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_A2_ADDR 4050 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_A1_ADDR 4051 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B2_ADDR 4052 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B1_ADDR 4053 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B0_ADDR 4054 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_A2_ADDR 4055 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_A1_ADDR 4056 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B2_ADDR 4057 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B1_ADDR 4058 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B0_ADDR 4059 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_A2_ADDR 4060 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_A1_ADDR 4061 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B2_ADDR 4062 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B1_ADDR 4063 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B0_ADDR 4064 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_A2_ADDR 4065 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_A1_ADDR 4066 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B2_ADDR 4067 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B1_ADDR 4068 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B0_ADDR 4069 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_A2_ADDR 4070 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_A1_ADDR 4071 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B2_ADDR 4072 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B1_ADDR 4073 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B0_ADDR 4074 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_A2_ADDR 4075 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_A1_ADDR 4076 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_6_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_7 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_7_COUNT 80 #define MOD_EQ_GEN_FILTER3_7_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B2_ADDR 4077 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B1_ADDR 4078 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B0_ADDR 4079 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_A2_ADDR 4080 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_A1_ADDR 4081 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B2_ADDR 4082 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B1_ADDR 4083 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B0_ADDR 4084 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_A2_ADDR 4085 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_A1_ADDR 4086 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B2_ADDR 4087 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B1_ADDR 4088 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B0_ADDR 4089 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_A2_ADDR 4090 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_A1_ADDR 4091 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B2_ADDR 4092 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B1_ADDR 4093 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B0_ADDR 4094 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_A2_ADDR 4095 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_A1_ADDR 4096 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B2_ADDR 4097 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B1_ADDR 4098 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B0_ADDR 4099 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_A2_ADDR 4100 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_A1_ADDR 4101 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B2_ADDR 4102 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B1_ADDR 4103 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B0_ADDR 4104 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_A2_ADDR 4105 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_A1_ADDR 4106 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B2_ADDR 4107 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B1_ADDR 4108 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B0_ADDR 4109 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_A2_ADDR 4110 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_A1_ADDR 4111 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B2_ADDR 4112 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B1_ADDR 4113 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B0_ADDR 4114 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_A2_ADDR 4115 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_A1_ADDR 4116 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B2_ADDR 4117 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B1_ADDR 4118 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B0_ADDR 4119 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_A2_ADDR 4120 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_A1_ADDR 4121 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B2_ADDR 4122 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B1_ADDR 4123 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B0_ADDR 4124 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_A2_ADDR 4125 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_A1_ADDR 4126 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B2_ADDR 4127 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B1_ADDR 4128 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B0_ADDR 4129 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_A2_ADDR 4130 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_A1_ADDR 4131 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B2_ADDR 4132 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B1_ADDR 4133 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B0_ADDR 4134 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_A2_ADDR 4135 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_A1_ADDR 4136 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B2_ADDR 4137 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B1_ADDR 4138 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B0_ADDR 4139 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_A2_ADDR 4140 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_A1_ADDR 4141 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B2_ADDR 4142 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B1_ADDR 4143 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B0_ADDR 4144 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_A2_ADDR 4145 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_A1_ADDR 4146 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B2_ADDR 4147 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B1_ADDR 4148 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B0_ADDR 4149 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_A2_ADDR 4150 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_A1_ADDR 4151 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B2_ADDR 4152 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B1_ADDR 4153 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B0_ADDR 4154 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_A2_ADDR 4155 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_A1_ADDR 4156 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_7_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_8 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_8_COUNT 80 #define MOD_EQ_GEN_FILTER3_8_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B2_ADDR 4157 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B1_ADDR 4158 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B0_ADDR 4159 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_A2_ADDR 4160 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_A1_ADDR 4161 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B2_ADDR 4162 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B1_ADDR 4163 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B0_ADDR 4164 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_A2_ADDR 4165 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_A1_ADDR 4166 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B2_ADDR 4167 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B1_ADDR 4168 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B0_ADDR 4169 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_A2_ADDR 4170 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_A1_ADDR 4171 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B2_ADDR 4172 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B1_ADDR 4173 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B0_ADDR 4174 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_A2_ADDR 4175 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_A1_ADDR 4176 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B2_ADDR 4177 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B1_ADDR 4178 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B0_ADDR 4179 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_A2_ADDR 4180 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_A1_ADDR 4181 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B2_ADDR 4182 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B1_ADDR 4183 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B0_ADDR 4184 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_A2_ADDR 4185 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_A1_ADDR 4186 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B2_ADDR 4187 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B1_ADDR 4188 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B0_ADDR 4189 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_A2_ADDR 4190 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_A1_ADDR 4191 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B2_ADDR 4192 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B1_ADDR 4193 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B0_ADDR 4194 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_A2_ADDR 4195 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_A1_ADDR 4196 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B2_ADDR 4197 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B1_ADDR 4198 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B0_ADDR 4199 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_A2_ADDR 4200 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_A1_ADDR 4201 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B2_ADDR 4202 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B1_ADDR 4203 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B0_ADDR 4204 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_A2_ADDR 4205 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_A1_ADDR 4206 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B2_ADDR 4207 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B1_ADDR 4208 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B0_ADDR 4209 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_A2_ADDR 4210 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_A1_ADDR 4211 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B2_ADDR 4212 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B1_ADDR 4213 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B0_ADDR 4214 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_A2_ADDR 4215 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_A1_ADDR 4216 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B2_ADDR 4217 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B1_ADDR 4218 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B0_ADDR 4219 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_A2_ADDR 4220 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_A1_ADDR 4221 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B2_ADDR 4222 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B1_ADDR 4223 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B0_ADDR 4224 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_A2_ADDR 4225 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_A1_ADDR 4226 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B2_ADDR 4227 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B1_ADDR 4228 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B0_ADDR 4229 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_A2_ADDR 4230 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_A1_ADDR 4231 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B2_ADDR 4232 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B1_ADDR 4233 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B0_ADDR 4234 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_A2_ADDR 4235 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_A1_ADDR 4236 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_8_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_9 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_9_COUNT 80 #define MOD_EQ_GEN_FILTER3_9_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B2_ADDR 4237 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B1_ADDR 4238 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B0_ADDR 4239 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_A2_ADDR 4240 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_A1_ADDR 4241 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B2_ADDR 4242 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B1_ADDR 4243 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B0_ADDR 4244 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_A2_ADDR 4245 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_A1_ADDR 4246 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B2_ADDR 4247 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B1_ADDR 4248 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B0_ADDR 4249 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_A2_ADDR 4250 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_A1_ADDR 4251 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B2_ADDR 4252 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B1_ADDR 4253 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B0_ADDR 4254 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_A2_ADDR 4255 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_A1_ADDR 4256 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B2_ADDR 4257 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B1_ADDR 4258 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B0_ADDR 4259 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_A2_ADDR 4260 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_A1_ADDR 4261 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B2_ADDR 4262 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B1_ADDR 4263 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B0_ADDR 4264 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_A2_ADDR 4265 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_A1_ADDR 4266 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B2_ADDR 4267 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B1_ADDR 4268 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B0_ADDR 4269 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_A2_ADDR 4270 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_A1_ADDR 4271 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B2_ADDR 4272 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B1_ADDR 4273 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B0_ADDR 4274 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_A2_ADDR 4275 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_A1_ADDR 4276 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B2_ADDR 4277 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B1_ADDR 4278 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B0_ADDR 4279 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_A2_ADDR 4280 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_A1_ADDR 4281 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B2_ADDR 4282 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B1_ADDR 4283 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B0_ADDR 4284 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_A2_ADDR 4285 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_A1_ADDR 4286 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B2_ADDR 4287 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B1_ADDR 4288 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B0_ADDR 4289 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_A2_ADDR 4290 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_A1_ADDR 4291 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B2_ADDR 4292 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B1_ADDR 4293 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B0_ADDR 4294 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_A2_ADDR 4295 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_A1_ADDR 4296 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B2_ADDR 4297 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B1_ADDR 4298 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B0_ADDR 4299 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_A2_ADDR 4300 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_A1_ADDR 4301 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B2_ADDR 4302 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B1_ADDR 4303 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B0_ADDR 4304 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_A2_ADDR 4305 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_A1_ADDR 4306 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B2_ADDR 4307 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B1_ADDR 4308 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B0_ADDR 4309 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_A2_ADDR 4310 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_A1_ADDR 4311 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B2_ADDR 4312 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B1_ADDR 4313 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B0_ADDR 4314 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_A2_ADDR 4315 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_A1_ADDR 4316 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_9_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_10 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_10_COUNT 80 #define MOD_EQ_GEN_FILTER3_10_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B2_ADDR 4317 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B1_ADDR 4318 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B0_ADDR 4319 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_A2_ADDR 4320 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_A1_ADDR 4321 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B2_ADDR 4322 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B1_ADDR 4323 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B0_ADDR 4324 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_A2_ADDR 4325 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_A1_ADDR 4326 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B2_ADDR 4327 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B1_ADDR 4328 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B0_ADDR 4329 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_A2_ADDR 4330 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_A1_ADDR 4331 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B2_ADDR 4332 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B1_ADDR 4333 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B0_ADDR 4334 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_A2_ADDR 4335 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_A1_ADDR 4336 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B2_ADDR 4337 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B1_ADDR 4338 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B0_ADDR 4339 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_A2_ADDR 4340 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_A1_ADDR 4341 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B2_ADDR 4342 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B1_ADDR 4343 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B0_ADDR 4344 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_A2_ADDR 4345 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_A1_ADDR 4346 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B2_ADDR 4347 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B1_ADDR 4348 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B0_ADDR 4349 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_A2_ADDR 4350 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_A1_ADDR 4351 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B2_ADDR 4352 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B1_ADDR 4353 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B0_ADDR 4354 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_A2_ADDR 4355 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_A1_ADDR 4356 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B2_ADDR 4357 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B1_ADDR 4358 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B0_ADDR 4359 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_A2_ADDR 4360 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_A1_ADDR 4361 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B2_ADDR 4362 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B1_ADDR 4363 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B0_ADDR 4364 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_A2_ADDR 4365 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_A1_ADDR 4366 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B2_ADDR 4367 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B1_ADDR 4368 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B0_ADDR 4369 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_A2_ADDR 4370 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_A1_ADDR 4371 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B2_ADDR 4372 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B1_ADDR 4373 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B0_ADDR 4374 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_A2_ADDR 4375 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_A1_ADDR 4376 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B2_ADDR 4377 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B1_ADDR 4378 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B0_ADDR 4379 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_A2_ADDR 4380 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_A1_ADDR 4381 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B2_ADDR 4382 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B1_ADDR 4383 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B0_ADDR 4384 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_A2_ADDR 4385 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_A1_ADDR 4386 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B2_ADDR 4387 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B1_ADDR 4388 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B0_ADDR 4389 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_A2_ADDR 4390 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_A1_ADDR 4391 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B2_ADDR 4392 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B1_ADDR 4393 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B0_ADDR 4394 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_A2_ADDR 4395 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_A1_ADDR 4396 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_10_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_11 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_11_COUNT 80 #define MOD_EQ_GEN_FILTER3_11_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B2_ADDR 4397 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B1_ADDR 4398 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B0_ADDR 4399 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_A2_ADDR 4400 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_A1_ADDR 4401 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B2_ADDR 4402 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B1_ADDR 4403 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B0_ADDR 4404 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_A2_ADDR 4405 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_A1_ADDR 4406 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B2_ADDR 4407 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B1_ADDR 4408 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B0_ADDR 4409 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_A2_ADDR 4410 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_A1_ADDR 4411 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B2_ADDR 4412 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B1_ADDR 4413 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B0_ADDR 4414 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_A2_ADDR 4415 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_A1_ADDR 4416 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B2_ADDR 4417 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B1_ADDR 4418 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B0_ADDR 4419 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_A2_ADDR 4420 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_A1_ADDR 4421 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B2_ADDR 4422 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B1_ADDR 4423 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B0_ADDR 4424 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_A2_ADDR 4425 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_A1_ADDR 4426 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B2_ADDR 4427 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B1_ADDR 4428 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B0_ADDR 4429 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_A2_ADDR 4430 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_A1_ADDR 4431 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B2_ADDR 4432 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B1_ADDR 4433 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B0_ADDR 4434 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_A2_ADDR 4435 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_A1_ADDR 4436 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B2_ADDR 4437 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B1_ADDR 4438 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B0_ADDR 4439 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_A2_ADDR 4440 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_A1_ADDR 4441 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B2_ADDR 4442 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B1_ADDR 4443 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B0_ADDR 4444 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_A2_ADDR 4445 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_A1_ADDR 4446 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B2_ADDR 4447 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B1_ADDR 4448 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B0_ADDR 4449 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_A2_ADDR 4450 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_A1_ADDR 4451 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B2_ADDR 4452 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B1_ADDR 4453 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B0_ADDR 4454 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_A2_ADDR 4455 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_A1_ADDR 4456 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B2_ADDR 4457 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B1_ADDR 4458 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B0_ADDR 4459 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_A2_ADDR 4460 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_A1_ADDR 4461 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B2_ADDR 4462 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B1_ADDR 4463 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B0_ADDR 4464 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_A2_ADDR 4465 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_A1_ADDR 4466 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B2_ADDR 4467 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B1_ADDR 4468 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B0_ADDR 4469 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_A2_ADDR 4470 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_A1_ADDR 4471 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B2_ADDR 4472 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B1_ADDR 4473 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B0_ADDR 4474 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_A2_ADDR 4475 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_A1_ADDR 4476 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_11_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_12 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_12_COUNT 80 #define MOD_EQ_GEN_FILTER3_12_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B2_ADDR 4477 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B1_ADDR 4478 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B0_ADDR 4479 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_A2_ADDR 4480 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_A1_ADDR 4481 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B2_ADDR 4482 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B1_ADDR 4483 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B0_ADDR 4484 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_A2_ADDR 4485 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_A1_ADDR 4486 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B2_ADDR 4487 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B1_ADDR 4488 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B0_ADDR 4489 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_A2_ADDR 4490 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_A1_ADDR 4491 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B2_ADDR 4492 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B1_ADDR 4493 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B0_ADDR 4494 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_A2_ADDR 4495 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_A1_ADDR 4496 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B2_ADDR 4497 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B1_ADDR 4498 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B0_ADDR 4499 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_A2_ADDR 4500 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_A1_ADDR 4501 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B2_ADDR 4502 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B1_ADDR 4503 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B0_ADDR 4504 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_A2_ADDR 4505 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_A1_ADDR 4506 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B2_ADDR 4507 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B1_ADDR 4508 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B0_ADDR 4509 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_A2_ADDR 4510 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_A1_ADDR 4511 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B2_ADDR 4512 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B1_ADDR 4513 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B0_ADDR 4514 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_A2_ADDR 4515 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_A1_ADDR 4516 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B2_ADDR 4517 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B1_ADDR 4518 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B0_ADDR 4519 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_A2_ADDR 4520 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_A1_ADDR 4521 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B2_ADDR 4522 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B1_ADDR 4523 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B0_ADDR 4524 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_A2_ADDR 4525 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_A1_ADDR 4526 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B2_ADDR 4527 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B1_ADDR 4528 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B0_ADDR 4529 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_A2_ADDR 4530 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_A1_ADDR 4531 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B2_ADDR 4532 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B1_ADDR 4533 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B0_ADDR 4534 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_A2_ADDR 4535 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_A1_ADDR 4536 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B2_ADDR 4537 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B1_ADDR 4538 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B0_ADDR 4539 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_A2_ADDR 4540 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_A1_ADDR 4541 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B2_ADDR 4542 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B1_ADDR 4543 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B0_ADDR 4544 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_A2_ADDR 4545 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_A1_ADDR 4546 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B2_ADDR 4547 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B1_ADDR 4548 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B0_ADDR 4549 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_A2_ADDR 4550 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_A1_ADDR 4551 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B2_ADDR 4552 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B1_ADDR 4553 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B0_ADDR 4554 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_A2_ADDR 4555 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_A1_ADDR 4556 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_12_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_13 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_13_COUNT 80 #define MOD_EQ_GEN_FILTER3_13_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B2_ADDR 4557 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B1_ADDR 4558 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B0_ADDR 4559 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_A2_ADDR 4560 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_A1_ADDR 4561 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B2_ADDR 4562 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B1_ADDR 4563 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B0_ADDR 4564 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_A2_ADDR 4565 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_A1_ADDR 4566 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B2_ADDR 4567 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B1_ADDR 4568 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B0_ADDR 4569 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_A2_ADDR 4570 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_A1_ADDR 4571 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B2_ADDR 4572 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B1_ADDR 4573 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B0_ADDR 4574 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_A2_ADDR 4575 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_A1_ADDR 4576 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B2_ADDR 4577 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B1_ADDR 4578 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B0_ADDR 4579 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_A2_ADDR 4580 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_A1_ADDR 4581 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B2_ADDR 4582 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B1_ADDR 4583 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B0_ADDR 4584 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_A2_ADDR 4585 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_A1_ADDR 4586 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B2_ADDR 4587 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B1_ADDR 4588 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B0_ADDR 4589 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_A2_ADDR 4590 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_A1_ADDR 4591 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B2_ADDR 4592 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B1_ADDR 4593 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B0_ADDR 4594 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_A2_ADDR 4595 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_A1_ADDR 4596 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B2_ADDR 4597 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B1_ADDR 4598 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B0_ADDR 4599 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_A2_ADDR 4600 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_A1_ADDR 4601 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B2_ADDR 4602 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B1_ADDR 4603 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B0_ADDR 4604 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_A2_ADDR 4605 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_A1_ADDR 4606 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B2_ADDR 4607 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B1_ADDR 4608 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B0_ADDR 4609 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_A2_ADDR 4610 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_A1_ADDR 4611 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B2_ADDR 4612 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B1_ADDR 4613 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B0_ADDR 4614 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_A2_ADDR 4615 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_A1_ADDR 4616 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B2_ADDR 4617 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B1_ADDR 4618 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B0_ADDR 4619 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_A2_ADDR 4620 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_A1_ADDR 4621 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B2_ADDR 4622 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B1_ADDR 4623 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B0_ADDR 4624 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_A2_ADDR 4625 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_A1_ADDR 4626 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B2_ADDR 4627 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B1_ADDR 4628 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B0_ADDR 4629 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_A2_ADDR 4630 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_A1_ADDR 4631 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B2_ADDR 4632 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B1_ADDR 4633 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B0_ADDR 4634 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_A2_ADDR 4635 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_A1_ADDR 4636 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_13_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_14 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_14_COUNT 80 #define MOD_EQ_GEN_FILTER3_14_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B2_ADDR 4637 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B1_ADDR 4638 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B0_ADDR 4639 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_A2_ADDR 4640 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_A1_ADDR 4641 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B2_ADDR 4642 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B1_ADDR 4643 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B0_ADDR 4644 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_A2_ADDR 4645 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_A1_ADDR 4646 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B2_ADDR 4647 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B1_ADDR 4648 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B0_ADDR 4649 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_A2_ADDR 4650 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_A1_ADDR 4651 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B2_ADDR 4652 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B1_ADDR 4653 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B0_ADDR 4654 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_A2_ADDR 4655 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_A1_ADDR 4656 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B2_ADDR 4657 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B1_ADDR 4658 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B0_ADDR 4659 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_A2_ADDR 4660 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_A1_ADDR 4661 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B2_ADDR 4662 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B1_ADDR 4663 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B0_ADDR 4664 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_A2_ADDR 4665 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_A1_ADDR 4666 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B2_ADDR 4667 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B1_ADDR 4668 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B0_ADDR 4669 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_A2_ADDR 4670 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_A1_ADDR 4671 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B2_ADDR 4672 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B1_ADDR 4673 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B0_ADDR 4674 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_A2_ADDR 4675 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_A1_ADDR 4676 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B2_ADDR 4677 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B1_ADDR 4678 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B0_ADDR 4679 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_A2_ADDR 4680 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_A1_ADDR 4681 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B2_ADDR 4682 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B1_ADDR 4683 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B0_ADDR 4684 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_A2_ADDR 4685 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_A1_ADDR 4686 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B2_ADDR 4687 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B1_ADDR 4688 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B0_ADDR 4689 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_A2_ADDR 4690 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_A1_ADDR 4691 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B2_ADDR 4692 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B1_ADDR 4693 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B0_ADDR 4694 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_A2_ADDR 4695 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_A1_ADDR 4696 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B2_ADDR 4697 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B1_ADDR 4698 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B0_ADDR 4699 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_A2_ADDR 4700 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_A1_ADDR 4701 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B2_ADDR 4702 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B1_ADDR 4703 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B0_ADDR 4704 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_A2_ADDR 4705 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_A1_ADDR 4706 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B2_ADDR 4707 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B1_ADDR 4708 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B0_ADDR 4709 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_A2_ADDR 4710 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_A1_ADDR 4711 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B2_ADDR 4712 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B1_ADDR 4713 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B0_ADDR 4714 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_A2_ADDR 4715 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_A1_ADDR 4716 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_14_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_15 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_15_COUNT 80 #define MOD_EQ_GEN_FILTER3_15_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B2_ADDR 4717 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B1_ADDR 4718 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B0_ADDR 4719 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_A2_ADDR 4720 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_A1_ADDR 4721 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B2_ADDR 4722 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B1_ADDR 4723 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B0_ADDR 4724 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_A2_ADDR 4725 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_A1_ADDR 4726 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B2_ADDR 4727 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B1_ADDR 4728 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B0_ADDR 4729 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_A2_ADDR 4730 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_A1_ADDR 4731 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B2_ADDR 4732 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B1_ADDR 4733 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B0_ADDR 4734 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_A2_ADDR 4735 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_A1_ADDR 4736 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B2_ADDR 4737 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B1_ADDR 4738 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B0_ADDR 4739 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_A2_ADDR 4740 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_A1_ADDR 4741 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B2_ADDR 4742 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B1_ADDR 4743 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B0_ADDR 4744 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_A2_ADDR 4745 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_A1_ADDR 4746 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B2_ADDR 4747 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B1_ADDR 4748 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B0_ADDR 4749 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_A2_ADDR 4750 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_A1_ADDR 4751 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B2_ADDR 4752 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B1_ADDR 4753 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B0_ADDR 4754 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_A2_ADDR 4755 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_A1_ADDR 4756 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B2_ADDR 4757 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B1_ADDR 4758 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B0_ADDR 4759 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_A2_ADDR 4760 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_A1_ADDR 4761 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B2_ADDR 4762 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B1_ADDR 4763 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B0_ADDR 4764 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_A2_ADDR 4765 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_A1_ADDR 4766 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B2_ADDR 4767 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B1_ADDR 4768 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B0_ADDR 4769 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_A2_ADDR 4770 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_A1_ADDR 4771 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B2_ADDR 4772 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B1_ADDR 4773 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B0_ADDR 4774 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_A2_ADDR 4775 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_A1_ADDR 4776 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B2_ADDR 4777 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B1_ADDR 4778 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B0_ADDR 4779 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_A2_ADDR 4780 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_A1_ADDR 4781 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B2_ADDR 4782 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B1_ADDR 4783 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B0_ADDR 4784 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_A2_ADDR 4785 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_A1_ADDR 4786 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B2_ADDR 4787 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B1_ADDR 4788 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B0_ADDR 4789 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_A2_ADDR 4790 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_A1_ADDR 4791 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B2_ADDR 4792 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B1_ADDR 4793 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B0_ADDR 4794 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_A2_ADDR 4795 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_A1_ADDR 4796 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_15_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Gen_Filter3_16 - General Eq (2nd order)*/ #define MOD_EQ_GEN_FILTER3_16_COUNT 80 #define MOD_EQ_GEN_FILTER3_16_DEVICE "IC1" #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B2_ADDR 4797 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B1_ADDR 4798 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B0_ADDR 4799 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_A2_ADDR 4800 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_A1_ADDR 4801 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE0_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B2_ADDR 4802 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B1_ADDR 4803 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B0_ADDR 4804 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_A2_ADDR 4805 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_A1_ADDR 4806 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE1_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B2_ADDR 4807 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B1_ADDR 4808 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B0_ADDR 4809 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_A2_ADDR 4810 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_A1_ADDR 4811 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE2_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B2_ADDR 4812 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B1_ADDR 4813 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B0_ADDR 4814 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_A2_ADDR 4815 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_A1_ADDR 4816 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE3_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B2_ADDR 4817 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B1_ADDR 4818 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B0_ADDR 4819 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_A2_ADDR 4820 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_A1_ADDR 4821 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE4_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B2_ADDR 4822 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B1_ADDR 4823 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B0_ADDR 4824 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_A2_ADDR 4825 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_A1_ADDR 4826 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE5_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B2_ADDR 4827 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B1_ADDR 4828 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B0_ADDR 4829 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_A2_ADDR 4830 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_A1_ADDR 4831 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE6_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B2_ADDR 4832 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B1_ADDR 4833 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B0_ADDR 4834 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_A2_ADDR 4835 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_A1_ADDR 4836 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE7_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B2_ADDR 4837 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B1_ADDR 4838 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B0_ADDR 4839 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_A2_ADDR 4840 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_A1_ADDR 4841 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE8_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B2_ADDR 4842 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B1_ADDR 4843 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B0_ADDR 4844 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_A2_ADDR 4845 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_A1_ADDR 4846 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE9_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B2_ADDR 4847 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B1_ADDR 4848 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B0_ADDR 4849 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_A2_ADDR 4850 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_A1_ADDR 4851 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE10_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B2_ADDR 4852 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B1_ADDR 4853 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B0_ADDR 4854 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_A2_ADDR 4855 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_A1_ADDR 4856 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE11_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B2_ADDR 4857 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B1_ADDR 4858 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B0_ADDR 4859 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_A2_ADDR 4860 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_A1_ADDR 4861 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE12_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B2_ADDR 4862 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B1_ADDR 4863 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B0_ADDR 4864 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_A2_ADDR 4865 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_A1_ADDR 4866 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE13_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B2_ADDR 4867 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B1_ADDR 4868 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B0_ADDR 4869 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_A2_ADDR 4870 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_A1_ADDR 4871 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE14_A1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B2_ADDR 4872 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B1_ADDR 4873 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B1_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B0_ADDR 4874 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_B0_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_A2_ADDR 4875 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_A2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_A2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_A2_MEMORYPAGE 0 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_A1_ADDR 4876 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_A1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0) #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_A1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GEN_FILTER3_16_ALG0_STAGE15_A1_MEMORYPAGE 0 /* Module Mixer2 - NxM Mixer*/ #define MOD_MIXER2_COUNT 256 #define MOD_MIXER2_DEVICE "IC1" #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0000_ADDR 4877 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0000_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0000_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0000_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0001_ADDR 4878 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0001_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0001_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0001_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0002_ADDR 4879 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0002_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0002_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0002_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0003_ADDR 4880 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0003_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0003_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0003_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0004_ADDR 4881 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0004_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0004_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0004_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0005_ADDR 4882 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0005_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0005_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0005_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0006_ADDR 4883 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0006_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0006_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0006_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0007_ADDR 4884 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0007_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0007_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0007_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0008_ADDR 4885 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0008_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0008_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0008_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0009_ADDR 4886 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0009_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0009_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0009_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0010_ADDR 4887 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0010_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0010_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0010_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0011_ADDR 4888 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0011_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0011_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0011_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0012_ADDR 4889 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0012_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0012_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0012_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0013_ADDR 4890 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0013_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0013_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0013_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0014_ADDR 4891 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0014_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0014_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0014_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0015_ADDR 4892 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0015_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0015_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0015_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0100_ADDR 4893 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0100_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0100_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0100_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0101_ADDR 4894 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0101_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0101_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0101_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0102_ADDR 4895 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0102_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0102_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0102_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0103_ADDR 4896 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0103_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0103_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0103_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0104_ADDR 4897 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0104_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0104_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0104_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0105_ADDR 4898 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0105_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0105_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0105_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0106_ADDR 4899 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0106_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0106_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0106_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0107_ADDR 4900 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0107_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0107_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0107_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0108_ADDR 4901 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0108_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0108_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0108_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0109_ADDR 4902 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0109_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0109_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0109_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0110_ADDR 4903 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0110_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0110_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0110_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0111_ADDR 4904 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0111_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0111_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0111_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0112_ADDR 4905 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0112_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0112_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0112_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0113_ADDR 4906 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0113_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0113_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0113_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0114_ADDR 4907 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0114_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0114_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0114_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0115_ADDR 4908 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0115_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0115_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0115_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0200_ADDR 4909 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0200_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0200_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0200_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0201_ADDR 4910 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0201_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0201_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0201_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0202_ADDR 4911 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0202_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0202_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0202_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0203_ADDR 4912 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0203_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0203_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0203_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0204_ADDR 4913 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0204_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0204_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0204_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0205_ADDR 4914 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0205_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0205_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0205_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0206_ADDR 4915 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0206_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0206_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0206_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0207_ADDR 4916 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0207_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0207_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0207_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0208_ADDR 4917 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0208_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0208_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0208_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0209_ADDR 4918 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0209_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0209_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0209_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0210_ADDR 4919 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0210_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0210_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0210_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0211_ADDR 4920 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0211_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0211_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0211_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0212_ADDR 4921 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0212_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0212_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0212_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0213_ADDR 4922 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0213_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0213_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0213_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0214_ADDR 4923 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0214_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0214_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0214_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0215_ADDR 4924 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0215_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0215_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0215_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0300_ADDR 4925 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0300_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0300_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0300_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0301_ADDR 4926 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0301_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0301_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0301_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0302_ADDR 4927 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0302_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0302_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0302_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0303_ADDR 4928 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0303_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0303_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0303_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0304_ADDR 4929 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0304_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0304_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0304_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0305_ADDR 4930 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0305_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0305_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0305_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0306_ADDR 4931 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0306_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0306_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0306_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0307_ADDR 4932 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0307_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0307_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0307_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0308_ADDR 4933 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0308_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0308_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0308_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0309_ADDR 4934 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0309_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0309_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0309_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0310_ADDR 4935 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0310_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0310_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0310_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0311_ADDR 4936 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0311_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0311_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0311_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0312_ADDR 4937 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0312_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0312_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0312_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0313_ADDR 4938 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0313_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0313_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0313_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0314_ADDR 4939 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0314_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0314_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0314_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0315_ADDR 4940 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0315_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0315_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0315_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0400_ADDR 4941 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0400_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0400_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0400_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0401_ADDR 4942 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0401_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0401_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0401_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0402_ADDR 4943 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0402_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0402_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0402_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0403_ADDR 4944 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0403_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0403_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0403_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0404_ADDR 4945 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0404_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0404_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0404_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0405_ADDR 4946 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0405_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0405_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0405_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0406_ADDR 4947 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0406_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0406_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0406_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0407_ADDR 4948 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0407_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0407_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0407_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0408_ADDR 4949 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0408_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0408_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0408_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0409_ADDR 4950 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0409_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0409_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0409_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0410_ADDR 4951 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0410_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0410_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0410_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0411_ADDR 4952 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0411_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0411_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0411_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0412_ADDR 4953 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0412_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0412_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0412_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0413_ADDR 4954 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0413_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0413_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0413_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0414_ADDR 4955 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0414_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0414_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0414_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0415_ADDR 4956 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0415_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0415_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0415_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0500_ADDR 4957 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0500_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0500_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0500_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0501_ADDR 4958 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0501_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0501_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0501_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0502_ADDR 4959 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0502_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0502_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0502_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0503_ADDR 4960 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0503_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0503_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0503_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0504_ADDR 4961 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0504_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0504_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0504_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0505_ADDR 4962 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0505_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0505_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0505_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0506_ADDR 4963 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0506_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0506_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0506_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0507_ADDR 4964 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0507_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0507_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0507_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0508_ADDR 4965 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0508_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0508_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0508_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0509_ADDR 4966 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0509_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0509_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0509_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0510_ADDR 4967 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0510_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0510_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0510_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0511_ADDR 4968 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0511_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0511_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0511_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0512_ADDR 4969 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0512_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0512_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0512_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0513_ADDR 4970 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0513_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0513_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0513_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0514_ADDR 4971 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0514_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0514_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0514_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0515_ADDR 4972 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0515_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0515_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0515_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0600_ADDR 4973 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0600_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0600_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0600_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0601_ADDR 4974 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0601_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0601_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0601_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0602_ADDR 4975 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0602_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0602_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0602_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0603_ADDR 4976 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0603_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0603_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0603_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0604_ADDR 4977 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0604_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0604_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0604_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0605_ADDR 4978 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0605_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0605_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0605_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0606_ADDR 4979 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0606_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0606_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0606_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0607_ADDR 4980 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0607_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0607_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0607_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0608_ADDR 4981 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0608_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0608_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0608_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0609_ADDR 4982 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0609_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0609_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0609_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0610_ADDR 4983 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0610_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0610_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0610_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0611_ADDR 4984 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0611_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0611_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0611_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0612_ADDR 4985 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0612_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0612_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0612_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0613_ADDR 4986 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0613_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0613_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0613_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0614_ADDR 4987 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0614_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0614_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0614_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0615_ADDR 4988 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0615_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0615_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0615_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0700_ADDR 4989 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0700_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0700_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0700_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0701_ADDR 4990 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0701_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0701_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0701_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0702_ADDR 4991 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0702_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0702_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0702_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0703_ADDR 4992 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0703_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0703_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0703_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0704_ADDR 4993 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0704_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0704_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0704_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0705_ADDR 4994 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0705_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0705_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0705_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0706_ADDR 4995 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0706_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0706_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0706_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0707_ADDR 4996 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0707_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0707_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0707_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0708_ADDR 4997 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0708_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0708_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0708_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0709_ADDR 4998 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0709_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0709_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0709_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0710_ADDR 4999 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0710_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0710_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0710_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0711_ADDR 5000 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0711_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0711_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0711_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0712_ADDR 5001 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0712_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0712_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0712_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0713_ADDR 5002 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0713_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0713_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0713_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0714_ADDR 5003 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0714_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0714_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0714_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0715_ADDR 5004 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0715_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0715_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0715_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0800_ADDR 5005 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0800_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0800_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0800_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0801_ADDR 5006 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0801_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0801_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0801_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0802_ADDR 5007 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0802_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0802_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0802_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0803_ADDR 5008 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0803_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0803_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0803_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0804_ADDR 5009 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0804_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0804_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0804_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0805_ADDR 5010 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0805_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0805_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0805_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0806_ADDR 5011 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0806_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0806_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0806_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0807_ADDR 5012 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0807_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0807_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0807_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0808_ADDR 5013 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0808_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0808_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0808_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0809_ADDR 5014 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0809_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0809_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0809_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0810_ADDR 5015 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0810_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0810_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0810_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0811_ADDR 5016 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0811_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0811_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0811_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0812_ADDR 5017 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0812_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0812_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0812_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0813_ADDR 5018 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0813_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0813_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0813_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0814_ADDR 5019 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0814_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0814_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0814_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0815_ADDR 5020 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0815_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0815_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0815_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0900_ADDR 5021 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0900_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0900_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0900_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0901_ADDR 5022 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0901_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0901_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0901_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0902_ADDR 5023 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0902_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0902_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0902_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0903_ADDR 5024 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0903_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0903_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0903_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0904_ADDR 5025 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0904_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0904_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0904_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0905_ADDR 5026 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0905_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0905_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0905_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0906_ADDR 5027 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0906_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0906_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0906_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0907_ADDR 5028 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0907_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0907_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0907_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0908_ADDR 5029 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0908_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0908_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0908_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0909_ADDR 5030 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0909_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0909_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0909_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0910_ADDR 5031 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0910_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0910_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0910_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0911_ADDR 5032 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0911_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0911_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0911_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0912_ADDR 5033 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0912_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0912_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0912_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0913_ADDR 5034 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0913_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0913_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0913_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0914_ADDR 5035 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0914_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0914_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0914_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0915_ADDR 5036 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0915_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0915_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL0915_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1000_ADDR 5037 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1000_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1000_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1000_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1001_ADDR 5038 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1001_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1001_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1001_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1002_ADDR 5039 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1002_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1002_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1002_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1003_ADDR 5040 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1003_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1003_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1003_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1004_ADDR 5041 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1004_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1004_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1004_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1005_ADDR 5042 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1005_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1005_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1005_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1006_ADDR 5043 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1006_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1006_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1006_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1007_ADDR 5044 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1007_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1007_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1007_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1008_ADDR 5045 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1008_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1008_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1008_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1009_ADDR 5046 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1009_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1009_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1009_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1010_ADDR 5047 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1010_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1010_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1010_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1011_ADDR 5048 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1011_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1011_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1011_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1012_ADDR 5049 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1012_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1012_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1012_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1013_ADDR 5050 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1013_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1013_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1013_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1014_ADDR 5051 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1014_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1014_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1014_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1015_ADDR 5052 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1015_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1015_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1015_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1100_ADDR 5053 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1100_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1100_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1100_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1101_ADDR 5054 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1101_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1101_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1101_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1102_ADDR 5055 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1102_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1102_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1102_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1103_ADDR 5056 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1103_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1103_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1103_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1104_ADDR 5057 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1104_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1104_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1104_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1105_ADDR 5058 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1105_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1105_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1105_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1106_ADDR 5059 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1106_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1106_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1106_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1107_ADDR 5060 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1107_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1107_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1107_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1108_ADDR 5061 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1108_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1108_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1108_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1109_ADDR 5062 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1109_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1109_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1109_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1110_ADDR 5063 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1110_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1110_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1110_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1111_ADDR 5064 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1111_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1111_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1111_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1112_ADDR 5065 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1112_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1112_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1112_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1113_ADDR 5066 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1113_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1113_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1113_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1114_ADDR 5067 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1114_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1114_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1114_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1115_ADDR 5068 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1115_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1115_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1115_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1200_ADDR 5069 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1200_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1200_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1200_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1201_ADDR 5070 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1201_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1201_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1201_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1202_ADDR 5071 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1202_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1202_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1202_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1203_ADDR 5072 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1203_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1203_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1203_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1204_ADDR 5073 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1204_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1204_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1204_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1205_ADDR 5074 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1205_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1205_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1205_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1206_ADDR 5075 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1206_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1206_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1206_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1207_ADDR 5076 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1207_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1207_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1207_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1208_ADDR 5077 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1208_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1208_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1208_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1209_ADDR 5078 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1209_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1209_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1209_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1210_ADDR 5079 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1210_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1210_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1210_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1211_ADDR 5080 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1211_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1211_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1211_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1212_ADDR 5081 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1212_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1212_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1212_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1213_ADDR 5082 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1213_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1213_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1213_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1214_ADDR 5083 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1214_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1214_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1214_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1215_ADDR 5084 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1215_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1215_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1215_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1300_ADDR 5085 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1300_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1300_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1300_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1301_ADDR 5086 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1301_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1301_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1301_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1302_ADDR 5087 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1302_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1302_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1302_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1303_ADDR 5088 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1303_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1303_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1303_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1304_ADDR 5089 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1304_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1304_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1304_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1305_ADDR 5090 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1305_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1305_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1305_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1306_ADDR 5091 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1306_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1306_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1306_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1307_ADDR 5092 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1307_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1307_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1307_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1308_ADDR 5093 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1308_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1308_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1308_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1309_ADDR 5094 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1309_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1309_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1309_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1310_ADDR 5095 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1310_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1310_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1310_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1311_ADDR 5096 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1311_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1311_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1311_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1312_ADDR 5097 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1312_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1312_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1312_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1313_ADDR 5098 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1313_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1313_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1313_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1314_ADDR 5099 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1314_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1314_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1314_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1315_ADDR 5100 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1315_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1315_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1315_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1400_ADDR 5101 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1400_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1400_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1400_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1401_ADDR 5102 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1401_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1401_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1401_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1402_ADDR 5103 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1402_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1402_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1402_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1403_ADDR 5104 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1403_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1403_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1403_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1404_ADDR 5105 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1404_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1404_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1404_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1405_ADDR 5106 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1405_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1405_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1405_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1406_ADDR 5107 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1406_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1406_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1406_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1407_ADDR 5108 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1407_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1407_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1407_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1408_ADDR 5109 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1408_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1408_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1408_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1409_ADDR 5110 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1409_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1409_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1409_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1410_ADDR 5111 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1410_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1410_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1410_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1411_ADDR 5112 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1411_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1411_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1411_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1412_ADDR 5113 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1412_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1412_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1412_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1413_ADDR 5114 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1413_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1413_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1413_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1414_ADDR 5115 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1414_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1414_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1414_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1415_ADDR 5116 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1415_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1415_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1415_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1500_ADDR 5117 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1500_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1500_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1500_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1501_ADDR 5118 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1501_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1501_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1501_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1502_ADDR 5119 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1502_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1502_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1502_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1503_ADDR 5120 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1503_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1503_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1503_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1504_ADDR 5121 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1504_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1504_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1504_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1505_ADDR 5122 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1505_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1505_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1505_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1506_ADDR 5123 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1506_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1506_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1506_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1507_ADDR 5124 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1507_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1507_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1507_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1508_ADDR 5125 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1508_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1508_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1508_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1509_ADDR 5126 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1509_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1509_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1509_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1510_ADDR 5127 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1510_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1510_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1510_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1511_ADDR 5128 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1511_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1511_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1511_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1512_ADDR 5129 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1512_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1512_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1512_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1513_ADDR 5130 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1513_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1513_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1513_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1514_ADDR 5131 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1514_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1E-07) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1514_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1514_MEMORYPAGE 0 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1515_ADDR 5132 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1515_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1515_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MIXER2_ALG0_NXNMIXS3004P6ALG1VOL1515_MEMORYPAGE 0 /* Module Channel_Gain - Multiple Volume Control*/ #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_COUNT 32 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_DEVICE "IC1" #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG0_TARGET_ADDR 5134 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG0_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG0_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG0_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG0_SLEW_MODE_ADDR 5135 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG0_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG0_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG0_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG0_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG1_TARGET_ADDR 5137 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG1_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG1_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG1_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG1_SLEW_MODE_ADDR 5138 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG1_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG1_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG1_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG1_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG2_TARGET_ADDR 5140 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG2_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG2_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG2_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG2_SLEW_MODE_ADDR 5141 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG2_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG2_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG2_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG2_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG3_TARGET_ADDR 5143 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG3_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG3_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG3_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG3_SLEW_MODE_ADDR 5144 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG3_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG3_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG3_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG3_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG4_TARGET_ADDR 5146 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG4_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG4_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG4_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG4_SLEW_MODE_ADDR 5147 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG4_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG4_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG4_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG4_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG5_TARGET_ADDR 5149 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG5_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG5_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG5_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG5_SLEW_MODE_ADDR 5150 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG5_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG5_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG5_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG5_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG6_TARGET_ADDR 5152 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG6_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG6_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG6_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG6_SLEW_MODE_ADDR 5153 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG6_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG6_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG6_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG6_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG7_TARGET_ADDR 5155 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG7_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG7_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG7_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG7_SLEW_MODE_ADDR 5156 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG7_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG7_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG7_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG7_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG8_TARGET_ADDR 5158 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG8_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG8_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG8_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG8_SLEW_MODE_ADDR 5159 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG8_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG8_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG8_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG8_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG9_TARGET_ADDR 5161 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG9_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG9_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG9_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG9_SLEW_MODE_ADDR 5162 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG9_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG9_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG9_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG9_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG10_TARGET_ADDR 5164 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG10_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG10_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG10_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG10_SLEW_MODE_ADDR 5165 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG10_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG10_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG10_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG10_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG11_TARGET_ADDR 5167 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG11_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG11_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG11_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG11_SLEW_MODE_ADDR 5168 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG11_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG11_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG11_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG11_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG12_TARGET_ADDR 5170 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG12_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG12_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG12_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG12_SLEW_MODE_ADDR 5171 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG12_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG12_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG12_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG12_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG13_TARGET_ADDR 5173 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG13_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG13_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG13_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG13_SLEW_MODE_ADDR 5174 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG13_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG13_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG13_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG13_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG14_TARGET_ADDR 5176 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG14_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG14_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG14_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG14_SLEW_MODE_ADDR 5177 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG14_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG14_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG14_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG14_SLEW_MODE_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG15_TARGET_ADDR 5179 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG15_TARGET_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG15_TARGET_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG15_TARGET_MEMORYPAGE 0 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG15_SLEW_MODE_ADDR 5180 #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG15_SLEW_MODE_FIXPT 0x0000208A #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG15_SLEW_MODE_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(8330) #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG15_SLEW_MODE_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_CHANNEL_GAIN_CHANNEL_GAIN_ALG15_SLEW_MODE_MEMORYPAGE 0 /* Module Compressor2 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_COUNT 64 #define MOD_DRC_COMPRESSOR2_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS0_ADDR 5181 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS1_ADDR 5182 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS2_ADDR 5183 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS3_ADDR 5184 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS4_ADDR 5185 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS5_ADDR 5186 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS6_ADDR 5187 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS7_ADDR 5188 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS8_ADDR 5189 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS9_ADDR 5190 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS10_ADDR 5191 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS11_ADDR 5192 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS12_ADDR 5193 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS13_ADDR 5194 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS14_ADDR 5195 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS15_ADDR 5196 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS16_ADDR 5197 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS17_ADDR 5198 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS18_ADDR 5199 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS19_ADDR 5200 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS20_ADDR 5201 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS21_ADDR 5202 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS22_ADDR 5203 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS23_ADDR 5204 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS24_ADDR 5205 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS25_ADDR 5206 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS26_ADDR 5207 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS27_ADDR 5208 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS28_ADDR 5209 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS29_ADDR 5210 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS30_ADDR 5211 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS31_ADDR 5212 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS32_ADDR 5213 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS33_ADDR 5214 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS34_ADDR 5215 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS35_ADDR 5216 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS36_ADDR 5217 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS37_ADDR 5218 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS38_ADDR 5219 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS39_ADDR 5220 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS40_ADDR 5221 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS41_ADDR 5222 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS42_ADDR 5223 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS43_ADDR 5224 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS44_ADDR 5225 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS45_ADDR 5226 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS46_ADDR 5227 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS47_ADDR 5228 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS48_ADDR 5229 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS49_ADDR 5230 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS50_ADDR 5231 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS51_ADDR 5232 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS52_ADDR 5233 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS53_ADDR 5234 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS54_ADDR 5235 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS55_ADDR 5236 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS56_ADDR 5237 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS57_ADDR 5238 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS58_ADDR 5239 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS59_ADDR 5240 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS60_ADDR 5241 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS61_ADDR 5242 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE37POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_HOLD_ADDR 15100 #define MOD_DRC_COMPRESSOR2_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_ALG0_DECAY_ADDR 15101 #define MOD_DRC_COMPRESSOR2_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_2 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_2_COUNT 64 #define MOD_DRC_COMPRESSOR2_2_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS0_ADDR 5243 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS1_ADDR 5244 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS2_ADDR 5245 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS3_ADDR 5246 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS4_ADDR 5247 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS5_ADDR 5248 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS6_ADDR 5249 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS7_ADDR 5250 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS8_ADDR 5251 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS9_ADDR 5252 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS10_ADDR 5253 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS11_ADDR 5254 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS12_ADDR 5255 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS13_ADDR 5256 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS14_ADDR 5257 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS15_ADDR 5258 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS16_ADDR 5259 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS17_ADDR 5260 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS18_ADDR 5261 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS19_ADDR 5262 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS20_ADDR 5263 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS21_ADDR 5264 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS22_ADDR 5265 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS23_ADDR 5266 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS24_ADDR 5267 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS25_ADDR 5268 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS26_ADDR 5269 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS27_ADDR 5270 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS28_ADDR 5271 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS29_ADDR 5272 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS30_ADDR 5273 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS31_ADDR 5274 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS32_ADDR 5275 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS33_ADDR 5276 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS34_ADDR 5277 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS35_ADDR 5278 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS36_ADDR 5279 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS37_ADDR 5280 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS38_ADDR 5281 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS39_ADDR 5282 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS40_ADDR 5283 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS41_ADDR 5284 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS42_ADDR 5285 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS43_ADDR 5286 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS44_ADDR 5287 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS45_ADDR 5288 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS46_ADDR 5289 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS47_ADDR 5290 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS48_ADDR 5291 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS49_ADDR 5292 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS50_ADDR 5293 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS51_ADDR 5294 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS52_ADDR 5295 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS53_ADDR 5296 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS54_ADDR 5297 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS55_ADDR 5298 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS56_ADDR 5299 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS57_ADDR 5300 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS58_ADDR 5301 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS59_ADDR 5302 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS60_ADDR 5303 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS61_ADDR 5304 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE38POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_HOLD_ADDR 15107 #define MOD_DRC_COMPRESSOR2_2_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_2_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_2_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_2_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_2_ALG0_DECAY_ADDR 15108 #define MOD_DRC_COMPRESSOR2_2_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_2_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_2_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_3 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_3_COUNT 64 #define MOD_DRC_COMPRESSOR2_3_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS0_ADDR 5305 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS1_ADDR 5306 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS2_ADDR 5307 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS3_ADDR 5308 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS4_ADDR 5309 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS5_ADDR 5310 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS6_ADDR 5311 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS7_ADDR 5312 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS8_ADDR 5313 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS9_ADDR 5314 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS10_ADDR 5315 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS11_ADDR 5316 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS12_ADDR 5317 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS13_ADDR 5318 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS14_ADDR 5319 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS15_ADDR 5320 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS16_ADDR 5321 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS17_ADDR 5322 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS18_ADDR 5323 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS19_ADDR 5324 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS20_ADDR 5325 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS21_ADDR 5326 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS22_ADDR 5327 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS23_ADDR 5328 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS24_ADDR 5329 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS25_ADDR 5330 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS26_ADDR 5331 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS27_ADDR 5332 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS28_ADDR 5333 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS29_ADDR 5334 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS30_ADDR 5335 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS31_ADDR 5336 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS32_ADDR 5337 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS33_ADDR 5338 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS34_ADDR 5339 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS35_ADDR 5340 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS36_ADDR 5341 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS37_ADDR 5342 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS38_ADDR 5343 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS39_ADDR 5344 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS40_ADDR 5345 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS41_ADDR 5346 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS42_ADDR 5347 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS43_ADDR 5348 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS44_ADDR 5349 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS45_ADDR 5350 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS46_ADDR 5351 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS47_ADDR 5352 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS48_ADDR 5353 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS49_ADDR 5354 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS50_ADDR 5355 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS51_ADDR 5356 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS52_ADDR 5357 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS53_ADDR 5358 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS54_ADDR 5359 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS55_ADDR 5360 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS56_ADDR 5361 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS57_ADDR 5362 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS58_ADDR 5363 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS59_ADDR 5364 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS60_ADDR 5365 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS61_ADDR 5366 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE39POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_HOLD_ADDR 15114 #define MOD_DRC_COMPRESSOR2_3_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_3_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_3_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_3_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_3_ALG0_DECAY_ADDR 15115 #define MOD_DRC_COMPRESSOR2_3_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_3_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_3_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_4 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_4_COUNT 64 #define MOD_DRC_COMPRESSOR2_4_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS0_ADDR 5367 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS1_ADDR 5368 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS2_ADDR 5369 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS3_ADDR 5370 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS4_ADDR 5371 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS5_ADDR 5372 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS6_ADDR 5373 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS7_ADDR 5374 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS8_ADDR 5375 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS9_ADDR 5376 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS10_ADDR 5377 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS11_ADDR 5378 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS12_ADDR 5379 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS13_ADDR 5380 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS14_ADDR 5381 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS15_ADDR 5382 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS16_ADDR 5383 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS17_ADDR 5384 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS18_ADDR 5385 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS19_ADDR 5386 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS20_ADDR 5387 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS21_ADDR 5388 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS22_ADDR 5389 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS23_ADDR 5390 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS24_ADDR 5391 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS25_ADDR 5392 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS26_ADDR 5393 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS27_ADDR 5394 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS28_ADDR 5395 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS29_ADDR 5396 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS30_ADDR 5397 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS31_ADDR 5398 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS32_ADDR 5399 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS33_ADDR 5400 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS34_ADDR 5401 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS35_ADDR 5402 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS36_ADDR 5403 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS37_ADDR 5404 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS38_ADDR 5405 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS39_ADDR 5406 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS40_ADDR 5407 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS41_ADDR 5408 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS42_ADDR 5409 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS43_ADDR 5410 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS44_ADDR 5411 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS45_ADDR 5412 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS46_ADDR 5413 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS47_ADDR 5414 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS48_ADDR 5415 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS49_ADDR 5416 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS50_ADDR 5417 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS51_ADDR 5418 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS52_ADDR 5419 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS53_ADDR 5420 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS54_ADDR 5421 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS55_ADDR 5422 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS56_ADDR 5423 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS57_ADDR 5424 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS58_ADDR 5425 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS59_ADDR 5426 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS60_ADDR 5427 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS61_ADDR 5428 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE40POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_HOLD_ADDR 15121 #define MOD_DRC_COMPRESSOR2_4_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_4_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_4_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_4_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_4_ALG0_DECAY_ADDR 15122 #define MOD_DRC_COMPRESSOR2_4_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_4_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_4_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_5 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_5_COUNT 64 #define MOD_DRC_COMPRESSOR2_5_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS0_ADDR 5429 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS1_ADDR 5430 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS2_ADDR 5431 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS3_ADDR 5432 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS4_ADDR 5433 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS5_ADDR 5434 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS6_ADDR 5435 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS7_ADDR 5436 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS8_ADDR 5437 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS9_ADDR 5438 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS10_ADDR 5439 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS11_ADDR 5440 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS12_ADDR 5441 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS13_ADDR 5442 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS14_ADDR 5443 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS15_ADDR 5444 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS16_ADDR 5445 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS17_ADDR 5446 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS18_ADDR 5447 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS19_ADDR 5448 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS20_ADDR 5449 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS21_ADDR 5450 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS22_ADDR 5451 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS23_ADDR 5452 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS24_ADDR 5453 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS25_ADDR 5454 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS26_ADDR 5455 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS27_ADDR 5456 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS28_ADDR 5457 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS29_ADDR 5458 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS30_ADDR 5459 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS31_ADDR 5460 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS32_ADDR 5461 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS33_ADDR 5462 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS34_ADDR 5463 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS35_ADDR 5464 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS36_ADDR 5465 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS37_ADDR 5466 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS38_ADDR 5467 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS39_ADDR 5468 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS40_ADDR 5469 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS41_ADDR 5470 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS42_ADDR 5471 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS43_ADDR 5472 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS44_ADDR 5473 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS45_ADDR 5474 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS46_ADDR 5475 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS47_ADDR 5476 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS48_ADDR 5477 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS49_ADDR 5478 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS50_ADDR 5479 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS51_ADDR 5480 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS52_ADDR 5481 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS53_ADDR 5482 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS54_ADDR 5483 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS55_ADDR 5484 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS56_ADDR 5485 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS57_ADDR 5486 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS58_ADDR 5487 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS59_ADDR 5488 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS60_ADDR 5489 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS61_ADDR 5490 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE41POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_HOLD_ADDR 15128 #define MOD_DRC_COMPRESSOR2_5_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_5_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_5_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_5_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_5_ALG0_DECAY_ADDR 15129 #define MOD_DRC_COMPRESSOR2_5_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_5_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_5_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_6 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_6_COUNT 64 #define MOD_DRC_COMPRESSOR2_6_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS0_ADDR 5491 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS1_ADDR 5492 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS2_ADDR 5493 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS3_ADDR 5494 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS4_ADDR 5495 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS5_ADDR 5496 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS6_ADDR 5497 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS7_ADDR 5498 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS8_ADDR 5499 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS9_ADDR 5500 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS10_ADDR 5501 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS11_ADDR 5502 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS12_ADDR 5503 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS13_ADDR 5504 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS14_ADDR 5505 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS15_ADDR 5506 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS16_ADDR 5507 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS17_ADDR 5508 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS18_ADDR 5509 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS19_ADDR 5510 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS20_ADDR 5511 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS21_ADDR 5512 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS22_ADDR 5513 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS23_ADDR 5514 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS24_ADDR 5515 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS25_ADDR 5516 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS26_ADDR 5517 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS27_ADDR 5518 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS28_ADDR 5519 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS29_ADDR 5520 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS30_ADDR 5521 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS31_ADDR 5522 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS32_ADDR 5523 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS33_ADDR 5524 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS34_ADDR 5525 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS35_ADDR 5526 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS36_ADDR 5527 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS37_ADDR 5528 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS38_ADDR 5529 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS39_ADDR 5530 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS40_ADDR 5531 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS41_ADDR 5532 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS42_ADDR 5533 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS43_ADDR 5534 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS44_ADDR 5535 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS45_ADDR 5536 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS46_ADDR 5537 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS47_ADDR 5538 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS48_ADDR 5539 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS49_ADDR 5540 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS50_ADDR 5541 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS51_ADDR 5542 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS52_ADDR 5543 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS53_ADDR 5544 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS54_ADDR 5545 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS55_ADDR 5546 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS56_ADDR 5547 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS57_ADDR 5548 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS58_ADDR 5549 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS59_ADDR 5550 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS60_ADDR 5551 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS61_ADDR 5552 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE42POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_HOLD_ADDR 15135 #define MOD_DRC_COMPRESSOR2_6_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_6_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_6_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_6_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_6_ALG0_DECAY_ADDR 15136 #define MOD_DRC_COMPRESSOR2_6_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_6_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_6_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_7 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_7_COUNT 64 #define MOD_DRC_COMPRESSOR2_7_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS0_ADDR 5553 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS1_ADDR 5554 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS2_ADDR 5555 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS3_ADDR 5556 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS4_ADDR 5557 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS5_ADDR 5558 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS6_ADDR 5559 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS7_ADDR 5560 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS8_ADDR 5561 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS9_ADDR 5562 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS10_ADDR 5563 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS11_ADDR 5564 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS12_ADDR 5565 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS13_ADDR 5566 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS14_ADDR 5567 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS15_ADDR 5568 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS16_ADDR 5569 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS17_ADDR 5570 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS18_ADDR 5571 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS19_ADDR 5572 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS20_ADDR 5573 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS21_ADDR 5574 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS22_ADDR 5575 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS23_ADDR 5576 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS24_ADDR 5577 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS25_ADDR 5578 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS26_ADDR 5579 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS27_ADDR 5580 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS28_ADDR 5581 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS29_ADDR 5582 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS30_ADDR 5583 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS31_ADDR 5584 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS32_ADDR 5585 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS33_ADDR 5586 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS34_ADDR 5587 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS35_ADDR 5588 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS36_ADDR 5589 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS37_ADDR 5590 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS38_ADDR 5591 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS39_ADDR 5592 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS40_ADDR 5593 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS41_ADDR 5594 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS42_ADDR 5595 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS43_ADDR 5596 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS44_ADDR 5597 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS45_ADDR 5598 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS46_ADDR 5599 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS47_ADDR 5600 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS48_ADDR 5601 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS49_ADDR 5602 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS50_ADDR 5603 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS51_ADDR 5604 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS52_ADDR 5605 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS53_ADDR 5606 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS54_ADDR 5607 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS55_ADDR 5608 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS56_ADDR 5609 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS57_ADDR 5610 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS58_ADDR 5611 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS59_ADDR 5612 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS60_ADDR 5613 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS61_ADDR 5614 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE43POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_HOLD_ADDR 15142 #define MOD_DRC_COMPRESSOR2_7_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_7_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_7_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_7_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_7_ALG0_DECAY_ADDR 15143 #define MOD_DRC_COMPRESSOR2_7_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_7_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_7_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_8 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_8_COUNT 64 #define MOD_DRC_COMPRESSOR2_8_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS0_ADDR 5615 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS1_ADDR 5616 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS2_ADDR 5617 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS3_ADDR 5618 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS4_ADDR 5619 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS5_ADDR 5620 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS6_ADDR 5621 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS7_ADDR 5622 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS8_ADDR 5623 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS9_ADDR 5624 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS10_ADDR 5625 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS11_ADDR 5626 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS12_ADDR 5627 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS13_ADDR 5628 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS14_ADDR 5629 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS15_ADDR 5630 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS16_ADDR 5631 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS17_ADDR 5632 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS18_ADDR 5633 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS19_ADDR 5634 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS20_ADDR 5635 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS21_ADDR 5636 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS22_ADDR 5637 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS23_ADDR 5638 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS24_ADDR 5639 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS25_ADDR 5640 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS26_ADDR 5641 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS27_ADDR 5642 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS28_ADDR 5643 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS29_ADDR 5644 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS30_ADDR 5645 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS31_ADDR 5646 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS32_ADDR 5647 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS33_ADDR 5648 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS34_ADDR 5649 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS35_ADDR 5650 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS36_ADDR 5651 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS37_ADDR 5652 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS38_ADDR 5653 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS39_ADDR 5654 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS40_ADDR 5655 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS41_ADDR 5656 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS42_ADDR 5657 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS43_ADDR 5658 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS44_ADDR 5659 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS45_ADDR 5660 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS46_ADDR 5661 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS47_ADDR 5662 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS48_ADDR 5663 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS49_ADDR 5664 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS50_ADDR 5665 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS51_ADDR 5666 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS52_ADDR 5667 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS53_ADDR 5668 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS54_ADDR 5669 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS55_ADDR 5670 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS56_ADDR 5671 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS57_ADDR 5672 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS58_ADDR 5673 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS59_ADDR 5674 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS60_ADDR 5675 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS61_ADDR 5676 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE44POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_HOLD_ADDR 15149 #define MOD_DRC_COMPRESSOR2_8_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_8_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_8_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_8_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_8_ALG0_DECAY_ADDR 15150 #define MOD_DRC_COMPRESSOR2_8_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_8_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_8_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_9 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_9_COUNT 64 #define MOD_DRC_COMPRESSOR2_9_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS0_ADDR 5677 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS1_ADDR 5678 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS2_ADDR 5679 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS3_ADDR 5680 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS4_ADDR 5681 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS5_ADDR 5682 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS6_ADDR 5683 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS7_ADDR 5684 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS8_ADDR 5685 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS9_ADDR 5686 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS10_ADDR 5687 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS11_ADDR 5688 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS12_ADDR 5689 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS13_ADDR 5690 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS14_ADDR 5691 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS15_ADDR 5692 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS16_ADDR 5693 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS17_ADDR 5694 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS18_ADDR 5695 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS19_ADDR 5696 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS20_ADDR 5697 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS21_ADDR 5698 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS22_ADDR 5699 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS23_ADDR 5700 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS24_ADDR 5701 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS25_ADDR 5702 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS26_ADDR 5703 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS27_ADDR 5704 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS28_ADDR 5705 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS29_ADDR 5706 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS30_ADDR 5707 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS31_ADDR 5708 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS32_ADDR 5709 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS33_ADDR 5710 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS34_ADDR 5711 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS35_ADDR 5712 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS36_ADDR 5713 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS37_ADDR 5714 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS38_ADDR 5715 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS39_ADDR 5716 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS40_ADDR 5717 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS41_ADDR 5718 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS42_ADDR 5719 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS43_ADDR 5720 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS44_ADDR 5721 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS45_ADDR 5722 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS46_ADDR 5723 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS47_ADDR 5724 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS48_ADDR 5725 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS49_ADDR 5726 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS50_ADDR 5727 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS51_ADDR 5728 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS52_ADDR 5729 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS53_ADDR 5730 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS54_ADDR 5731 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS55_ADDR 5732 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS56_ADDR 5733 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS57_ADDR 5734 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS58_ADDR 5735 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS59_ADDR 5736 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS60_ADDR 5737 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS61_ADDR 5738 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE45POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_HOLD_ADDR 15156 #define MOD_DRC_COMPRESSOR2_9_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_9_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_9_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_9_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_9_ALG0_DECAY_ADDR 15157 #define MOD_DRC_COMPRESSOR2_9_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_9_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_9_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_10 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_10_COUNT 64 #define MOD_DRC_COMPRESSOR2_10_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS0_ADDR 5739 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS1_ADDR 5740 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS2_ADDR 5741 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS3_ADDR 5742 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS4_ADDR 5743 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS5_ADDR 5744 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS6_ADDR 5745 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS7_ADDR 5746 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS8_ADDR 5747 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS9_ADDR 5748 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS10_ADDR 5749 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS11_ADDR 5750 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS12_ADDR 5751 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS13_ADDR 5752 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS14_ADDR 5753 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS15_ADDR 5754 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS16_ADDR 5755 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS17_ADDR 5756 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS18_ADDR 5757 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS19_ADDR 5758 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS20_ADDR 5759 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS21_ADDR 5760 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS22_ADDR 5761 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS23_ADDR 5762 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS24_ADDR 5763 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS25_ADDR 5764 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS26_ADDR 5765 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS27_ADDR 5766 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS28_ADDR 5767 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS29_ADDR 5768 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS30_ADDR 5769 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS31_ADDR 5770 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS32_ADDR 5771 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS33_ADDR 5772 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS34_ADDR 5773 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS35_ADDR 5774 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS36_ADDR 5775 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS37_ADDR 5776 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS38_ADDR 5777 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS39_ADDR 5778 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS40_ADDR 5779 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS41_ADDR 5780 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS42_ADDR 5781 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS43_ADDR 5782 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS44_ADDR 5783 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS45_ADDR 5784 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS46_ADDR 5785 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS47_ADDR 5786 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS48_ADDR 5787 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS49_ADDR 5788 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS50_ADDR 5789 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS51_ADDR 5790 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS52_ADDR 5791 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS53_ADDR 5792 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS54_ADDR 5793 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS55_ADDR 5794 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS56_ADDR 5795 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS57_ADDR 5796 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS58_ADDR 5797 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS59_ADDR 5798 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS60_ADDR 5799 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS61_ADDR 5800 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE46POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_HOLD_ADDR 15163 #define MOD_DRC_COMPRESSOR2_10_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_10_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_10_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_10_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_10_ALG0_DECAY_ADDR 15164 #define MOD_DRC_COMPRESSOR2_10_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_10_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_10_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_11 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_11_COUNT 64 #define MOD_DRC_COMPRESSOR2_11_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS0_ADDR 5801 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS1_ADDR 5802 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS2_ADDR 5803 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS3_ADDR 5804 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS4_ADDR 5805 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS5_ADDR 5806 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS6_ADDR 5807 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS7_ADDR 5808 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS8_ADDR 5809 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS9_ADDR 5810 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS10_ADDR 5811 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS11_ADDR 5812 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS12_ADDR 5813 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS13_ADDR 5814 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS14_ADDR 5815 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS15_ADDR 5816 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS16_ADDR 5817 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS17_ADDR 5818 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS18_ADDR 5819 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS19_ADDR 5820 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS20_ADDR 5821 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS21_ADDR 5822 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS22_ADDR 5823 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS23_ADDR 5824 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS24_ADDR 5825 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS25_ADDR 5826 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS26_ADDR 5827 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS27_ADDR 5828 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS28_ADDR 5829 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS29_ADDR 5830 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS30_ADDR 5831 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS31_ADDR 5832 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS32_ADDR 5833 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS33_ADDR 5834 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS34_ADDR 5835 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS35_ADDR 5836 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS36_ADDR 5837 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS37_ADDR 5838 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS38_ADDR 5839 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS39_ADDR 5840 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS40_ADDR 5841 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS41_ADDR 5842 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS42_ADDR 5843 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS43_ADDR 5844 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS44_ADDR 5845 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS45_ADDR 5846 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS46_ADDR 5847 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS47_ADDR 5848 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS48_ADDR 5849 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS49_ADDR 5850 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS50_ADDR 5851 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS51_ADDR 5852 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS52_ADDR 5853 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS53_ADDR 5854 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS54_ADDR 5855 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS55_ADDR 5856 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS56_ADDR 5857 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS57_ADDR 5858 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS58_ADDR 5859 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS59_ADDR 5860 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS60_ADDR 5861 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS61_ADDR 5862 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE47POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_HOLD_ADDR 15170 #define MOD_DRC_COMPRESSOR2_11_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_11_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_11_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_11_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_11_ALG0_DECAY_ADDR 15171 #define MOD_DRC_COMPRESSOR2_11_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_11_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_11_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_12 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_12_COUNT 64 #define MOD_DRC_COMPRESSOR2_12_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS0_ADDR 5863 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS1_ADDR 5864 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS2_ADDR 5865 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS3_ADDR 5866 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS4_ADDR 5867 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS5_ADDR 5868 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS6_ADDR 5869 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS7_ADDR 5870 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS8_ADDR 5871 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS9_ADDR 5872 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS10_ADDR 5873 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS11_ADDR 5874 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS12_ADDR 5875 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS13_ADDR 5876 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS14_ADDR 5877 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS15_ADDR 5878 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS16_ADDR 5879 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS17_ADDR 5880 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS18_ADDR 5881 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS19_ADDR 5882 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS20_ADDR 5883 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS21_ADDR 5884 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS22_ADDR 5885 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS23_ADDR 5886 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS24_ADDR 5887 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS25_ADDR 5888 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS26_ADDR 5889 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS27_ADDR 5890 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS28_ADDR 5891 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS29_ADDR 5892 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS30_ADDR 5893 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS31_ADDR 5894 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS32_ADDR 5895 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS33_ADDR 5896 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS34_ADDR 5897 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS35_ADDR 5898 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS36_ADDR 5899 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS37_ADDR 5900 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS38_ADDR 5901 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS39_ADDR 5902 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS40_ADDR 5903 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS41_ADDR 5904 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS42_ADDR 5905 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS43_ADDR 5906 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS44_ADDR 5907 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS45_ADDR 5908 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS46_ADDR 5909 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS47_ADDR 5910 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS48_ADDR 5911 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS49_ADDR 5912 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS50_ADDR 5913 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS51_ADDR 5914 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS52_ADDR 5915 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS53_ADDR 5916 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS54_ADDR 5917 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS55_ADDR 5918 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS56_ADDR 5919 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS57_ADDR 5920 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS58_ADDR 5921 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS59_ADDR 5922 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS60_ADDR 5923 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS61_ADDR 5924 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE48POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_HOLD_ADDR 15177 #define MOD_DRC_COMPRESSOR2_12_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_12_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_12_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_12_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_12_ALG0_DECAY_ADDR 15178 #define MOD_DRC_COMPRESSOR2_12_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_12_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_12_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_13 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_13_COUNT 64 #define MOD_DRC_COMPRESSOR2_13_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS0_ADDR 5925 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS1_ADDR 5926 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS2_ADDR 5927 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS3_ADDR 5928 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS4_ADDR 5929 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS5_ADDR 5930 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS6_ADDR 5931 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS7_ADDR 5932 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS8_ADDR 5933 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS9_ADDR 5934 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS10_ADDR 5935 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS11_ADDR 5936 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS12_ADDR 5937 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS13_ADDR 5938 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS14_ADDR 5939 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS15_ADDR 5940 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS16_ADDR 5941 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS17_ADDR 5942 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS18_ADDR 5943 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS19_ADDR 5944 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS20_ADDR 5945 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS21_ADDR 5946 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS22_ADDR 5947 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS23_ADDR 5948 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS24_ADDR 5949 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS25_ADDR 5950 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS26_ADDR 5951 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS27_ADDR 5952 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS28_ADDR 5953 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS29_ADDR 5954 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS30_ADDR 5955 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS31_ADDR 5956 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS32_ADDR 5957 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS33_ADDR 5958 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS34_ADDR 5959 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS35_ADDR 5960 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS36_ADDR 5961 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS37_ADDR 5962 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS38_ADDR 5963 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS39_ADDR 5964 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS40_ADDR 5965 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS41_ADDR 5966 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS42_ADDR 5967 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS43_ADDR 5968 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS44_ADDR 5969 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS45_ADDR 5970 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS46_ADDR 5971 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS47_ADDR 5972 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS48_ADDR 5973 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS49_ADDR 5974 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS50_ADDR 5975 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS51_ADDR 5976 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS52_ADDR 5977 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS53_ADDR 5978 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS54_ADDR 5979 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS55_ADDR 5980 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS56_ADDR 5981 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS57_ADDR 5982 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS58_ADDR 5983 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS59_ADDR 5984 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS60_ADDR 5985 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS61_ADDR 5986 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE49POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_HOLD_ADDR 15184 #define MOD_DRC_COMPRESSOR2_13_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_13_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_13_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_13_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_13_ALG0_DECAY_ADDR 15185 #define MOD_DRC_COMPRESSOR2_13_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_13_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_13_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_14 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_14_COUNT 64 #define MOD_DRC_COMPRESSOR2_14_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS0_ADDR 5987 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS1_ADDR 5988 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS2_ADDR 5989 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS3_ADDR 5990 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS4_ADDR 5991 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS5_ADDR 5992 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS6_ADDR 5993 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS7_ADDR 5994 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS8_ADDR 5995 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS9_ADDR 5996 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS10_ADDR 5997 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS11_ADDR 5998 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS12_ADDR 5999 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS13_ADDR 6000 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS14_ADDR 6001 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS15_ADDR 6002 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS16_ADDR 6003 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS17_ADDR 6004 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS18_ADDR 6005 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS19_ADDR 6006 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS20_ADDR 6007 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS21_ADDR 6008 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS22_ADDR 6009 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS23_ADDR 6010 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS24_ADDR 6011 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS25_ADDR 6012 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS26_ADDR 6013 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS27_ADDR 6014 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS28_ADDR 6015 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS29_ADDR 6016 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS30_ADDR 6017 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS31_ADDR 6018 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS32_ADDR 6019 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS33_ADDR 6020 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS34_ADDR 6021 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS35_ADDR 6022 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS36_ADDR 6023 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS37_ADDR 6024 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS38_ADDR 6025 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS39_ADDR 6026 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS40_ADDR 6027 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS41_ADDR 6028 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS42_ADDR 6029 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS43_ADDR 6030 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS44_ADDR 6031 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS45_ADDR 6032 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS46_ADDR 6033 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS47_ADDR 6034 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS48_ADDR 6035 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS49_ADDR 6036 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS50_ADDR 6037 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS51_ADDR 6038 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS52_ADDR 6039 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS53_ADDR 6040 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS54_ADDR 6041 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS55_ADDR 6042 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS56_ADDR 6043 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS57_ADDR 6044 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS58_ADDR 6045 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS59_ADDR 6046 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS60_ADDR 6047 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS61_ADDR 6048 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE50POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_HOLD_ADDR 15191 #define MOD_DRC_COMPRESSOR2_14_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_14_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_14_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_14_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_14_ALG0_DECAY_ADDR 15192 #define MOD_DRC_COMPRESSOR2_14_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_14_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_14_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_15 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_15_COUNT 64 #define MOD_DRC_COMPRESSOR2_15_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS0_ADDR 6049 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS1_ADDR 6050 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS2_ADDR 6051 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS3_ADDR 6052 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS4_ADDR 6053 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS5_ADDR 6054 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS6_ADDR 6055 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS7_ADDR 6056 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS8_ADDR 6057 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS9_ADDR 6058 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS10_ADDR 6059 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS11_ADDR 6060 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS12_ADDR 6061 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS13_ADDR 6062 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS14_ADDR 6063 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS15_ADDR 6064 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS16_ADDR 6065 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS17_ADDR 6066 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS18_ADDR 6067 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS19_ADDR 6068 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS20_ADDR 6069 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS21_ADDR 6070 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS22_ADDR 6071 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS23_ADDR 6072 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS24_ADDR 6073 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS25_ADDR 6074 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS26_ADDR 6075 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS27_ADDR 6076 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS28_ADDR 6077 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS29_ADDR 6078 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS30_ADDR 6079 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS31_ADDR 6080 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS32_ADDR 6081 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS33_ADDR 6082 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS34_ADDR 6083 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS35_ADDR 6084 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS36_ADDR 6085 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS37_ADDR 6086 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS38_ADDR 6087 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS39_ADDR 6088 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS40_ADDR 6089 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS41_ADDR 6090 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS42_ADDR 6091 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS43_ADDR 6092 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS44_ADDR 6093 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS45_ADDR 6094 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS46_ADDR 6095 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS47_ADDR 6096 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS48_ADDR 6097 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS49_ADDR 6098 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS50_ADDR 6099 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS51_ADDR 6100 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS52_ADDR 6101 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS53_ADDR 6102 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS54_ADDR 6103 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS55_ADDR 6104 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS56_ADDR 6105 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS57_ADDR 6106 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS58_ADDR 6107 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS59_ADDR 6108 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS60_ADDR 6109 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS61_ADDR 6110 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE51POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_HOLD_ADDR 15198 #define MOD_DRC_COMPRESSOR2_15_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_15_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_15_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_15_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_15_ALG0_DECAY_ADDR 15199 #define MOD_DRC_COMPRESSOR2_15_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_15_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_15_ALG0_DECAY_MEMORYPAGE 0 /* Module Compressor2_16 - Peak (no gain)*/ #define MOD_DRC_COMPRESSOR2_16_COUNT 64 #define MOD_DRC_COMPRESSOR2_16_DEVICE "IC1" #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS0_ADDR 6111 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS0_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS0_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS0_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS1_ADDR 6112 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS1_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS1_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS1_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS2_ADDR 6113 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS2_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS2_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS2_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS3_ADDR 6114 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS3_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS3_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS3_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS4_ADDR 6115 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS4_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS4_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS4_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS5_ADDR 6116 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS5_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS5_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS5_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS6_ADDR 6117 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS6_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS6_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS6_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS7_ADDR 6118 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS7_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS7_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS7_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS8_ADDR 6119 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS8_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS8_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS8_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS9_ADDR 6120 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS9_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS9_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS9_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS10_ADDR 6121 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS10_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS10_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS10_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS11_ADDR 6122 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS11_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS11_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS11_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS12_ADDR 6123 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS12_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS12_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS12_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS13_ADDR 6124 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS13_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS13_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS13_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS14_ADDR 6125 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS14_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS14_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS14_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS15_ADDR 6126 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS15_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS15_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS15_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS16_ADDR 6127 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS16_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS16_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS16_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS17_ADDR 6128 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS17_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS17_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS17_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS18_ADDR 6129 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS18_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS18_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS18_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS19_ADDR 6130 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS19_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS19_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS19_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS20_ADDR 6131 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS20_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS20_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS20_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS21_ADDR 6132 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS21_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS21_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS21_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS22_ADDR 6133 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS22_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS22_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS22_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS23_ADDR 6134 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS23_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS23_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS23_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS24_ADDR 6135 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS24_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS24_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS24_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS25_ADDR 6136 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS25_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS25_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS25_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS26_ADDR 6137 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS26_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS26_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS26_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS27_ADDR 6138 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS27_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS27_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS27_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS28_ADDR 6139 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS28_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS28_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS28_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS29_ADDR 6140 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS29_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS29_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS29_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS30_ADDR 6141 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS30_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS30_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS30_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS31_ADDR 6142 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS31_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS31_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS31_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS32_ADDR 6143 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS32_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS32_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS32_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS33_ADDR 6144 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS33_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS33_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS33_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS34_ADDR 6145 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS34_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS34_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS34_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS35_ADDR 6146 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS35_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS35_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS35_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS36_ADDR 6147 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS36_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS36_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS36_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS37_ADDR 6148 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS37_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS37_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS37_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS38_ADDR 6149 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS38_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS38_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS38_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS39_ADDR 6150 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS39_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS39_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS39_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS40_ADDR 6151 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS40_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS40_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS40_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS41_ADDR 6152 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS41_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS41_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS41_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS42_ADDR 6153 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS42_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS42_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS42_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS43_ADDR 6154 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS43_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS43_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS43_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS44_ADDR 6155 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS44_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS44_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS44_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS45_ADDR 6156 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS45_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS45_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS45_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS46_ADDR 6157 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS46_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS46_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS46_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS47_ADDR 6158 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS47_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS47_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS47_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS48_ADDR 6159 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS48_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS48_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS48_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS49_ADDR 6160 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS49_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS49_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS49_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS50_ADDR 6161 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS50_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS50_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS50_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS51_ADDR 6162 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS51_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS51_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS51_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS52_ADDR 6163 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS52_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS52_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS52_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS53_ADDR 6164 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS53_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS53_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS53_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS54_ADDR 6165 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS54_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS54_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS54_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS55_ADDR 6166 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS55_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS55_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS55_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS56_ADDR 6167 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS56_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS56_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS56_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS57_ADDR 6168 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS57_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS57_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS57_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS58_ADDR 6169 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS58_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS58_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS58_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS59_ADDR 6170 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS59_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS59_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS59_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS60_ADDR 6171 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS60_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS60_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS60_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS61_ADDR 6172 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS61_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(0.707106781186547) #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS61_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_ONECHANPEAKNOPOSTGAINS300FULLRANGE52POINTS61_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_HOLD_ADDR 15205 #define MOD_DRC_COMPRESSOR2_16_ALG0_HOLD_FIXPT 0x00000000 #define MOD_DRC_COMPRESSOR2_16_ALG0_HOLD_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DRC_COMPRESSOR2_16_ALG0_HOLD_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DRC_COMPRESSOR2_16_ALG0_HOLD_MEMORYPAGE 0 #define MOD_DRC_COMPRESSOR2_16_ALG0_DECAY_ADDR 15206 #define MOD_DRC_COMPRESSOR2_16_ALG0_DECAY_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(2.17013888888889E-06) #define MOD_DRC_COMPRESSOR2_16_ALG0_DECAY_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_DRC_COMPRESSOR2_16_ALG0_DECAY_MEMORYPAGE 0 /* Module Delay2_1 - Delay*/ #define MOD_DELAY_DELAY2_1_COUNT 1 #define MOD_DELAY_DELAY2_1_DEVICE "IC1" #define MOD_DELAY_DELAY2_1_DELAYAMT_ADDR 6173 #define MOD_DELAY_DELAY2_1_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_1_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_1_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_1_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_2 - Delay*/ #define MOD_DELAY_DELAY2_2_COUNT 1 #define MOD_DELAY_DELAY2_2_DEVICE "IC1" #define MOD_DELAY_DELAY2_2_DELAYAMT_ADDR 6174 #define MOD_DELAY_DELAY2_2_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_2_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_2_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_2_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_3 - Delay*/ #define MOD_DELAY_DELAY2_3_COUNT 1 #define MOD_DELAY_DELAY2_3_DEVICE "IC1" #define MOD_DELAY_DELAY2_3_DELAYAMT_ADDR 6175 #define MOD_DELAY_DELAY2_3_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_3_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_3_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_3_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_4 - Delay*/ #define MOD_DELAY_DELAY2_4_COUNT 1 #define MOD_DELAY_DELAY2_4_DEVICE "IC1" #define MOD_DELAY_DELAY2_4_DELAYAMT_ADDR 6176 #define MOD_DELAY_DELAY2_4_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_4_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_4_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_4_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_5 - Delay*/ #define MOD_DELAY_DELAY2_5_COUNT 1 #define MOD_DELAY_DELAY2_5_DEVICE "IC1" #define MOD_DELAY_DELAY2_5_DELAYAMT_ADDR 6177 #define MOD_DELAY_DELAY2_5_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_5_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_5_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_5_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_6 - Delay*/ #define MOD_DELAY_DELAY2_6_COUNT 1 #define MOD_DELAY_DELAY2_6_DEVICE "IC1" #define MOD_DELAY_DELAY2_6_DELAYAMT_ADDR 6178 #define MOD_DELAY_DELAY2_6_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_6_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_6_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_6_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_7 - Delay*/ #define MOD_DELAY_DELAY2_7_COUNT 1 #define MOD_DELAY_DELAY2_7_DEVICE "IC1" #define MOD_DELAY_DELAY2_7_DELAYAMT_ADDR 6179 #define MOD_DELAY_DELAY2_7_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_7_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_7_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_7_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_8 - Delay*/ #define MOD_DELAY_DELAY2_8_COUNT 1 #define MOD_DELAY_DELAY2_8_DEVICE "IC1" #define MOD_DELAY_DELAY2_8_DELAYAMT_ADDR 6180 #define MOD_DELAY_DELAY2_8_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_8_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_8_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_8_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_9 - Delay*/ #define MOD_DELAY_DELAY2_9_COUNT 1 #define MOD_DELAY_DELAY2_9_DEVICE "IC1" #define MOD_DELAY_DELAY2_9_DELAYAMT_ADDR 6181 #define MOD_DELAY_DELAY2_9_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_9_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_9_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_9_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_10 - Delay*/ #define MOD_DELAY_DELAY2_10_COUNT 1 #define MOD_DELAY_DELAY2_10_DEVICE "IC1" #define MOD_DELAY_DELAY2_10_DELAYAMT_ADDR 6182 #define MOD_DELAY_DELAY2_10_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_10_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_10_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_10_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_11 - Delay*/ #define MOD_DELAY_DELAY2_11_COUNT 1 #define MOD_DELAY_DELAY2_11_DEVICE "IC1" #define MOD_DELAY_DELAY2_11_DELAYAMT_ADDR 6183 #define MOD_DELAY_DELAY2_11_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_11_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_11_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_11_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_12 - Delay*/ #define MOD_DELAY_DELAY2_12_COUNT 1 #define MOD_DELAY_DELAY2_12_DEVICE "IC1" #define MOD_DELAY_DELAY2_12_DELAYAMT_ADDR 6184 #define MOD_DELAY_DELAY2_12_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_12_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_12_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_12_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_13 - Delay*/ #define MOD_DELAY_DELAY2_13_COUNT 1 #define MOD_DELAY_DELAY2_13_DEVICE "IC1" #define MOD_DELAY_DELAY2_13_DELAYAMT_ADDR 6185 #define MOD_DELAY_DELAY2_13_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_13_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_13_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_13_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_14 - Delay*/ #define MOD_DELAY_DELAY2_14_COUNT 1 #define MOD_DELAY_DELAY2_14_DEVICE "IC1" #define MOD_DELAY_DELAY2_14_DELAYAMT_ADDR 6186 #define MOD_DELAY_DELAY2_14_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_14_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_14_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_14_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_15 - Delay*/ #define MOD_DELAY_DELAY2_15_COUNT 1 #define MOD_DELAY_DELAY2_15_DEVICE "IC1" #define MOD_DELAY_DELAY2_15_DELAYAMT_ADDR 6187 #define MOD_DELAY_DELAY2_15_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_15_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_15_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_15_DELAYAMT_MEMORYPAGE 0 /* Module Delay2_16 - Delay*/ #define MOD_DELAY_DELAY2_16_COUNT 1 #define MOD_DELAY_DELAY2_16_DEVICE "IC1" #define MOD_DELAY_DELAY2_16_DELAYAMT_ADDR 6188 #define MOD_DELAY_DELAY2_16_DELAYAMT_FIXPT 0x00000000 #define MOD_DELAY_DELAY2_16_DELAYAMT_VALUE SIGMASTUDIOTYPE_INTEGER_CONVERT(0) #define MOD_DELAY_DELAY2_16_DELAYAMT_TYPE SIGMASTUDIOTYPE_INTEGER #define MOD_DELAY_DELAY2_16_DELAYAMT_MEMORYPAGE 0 /* Module Pre_EQ_Gain - Multiple Volume Control*/ #define MOD_PRE_EQ_GAIN_COUNT 16 #define MOD_PRE_EQ_GAIN_DEVICE "IC1" #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_ADDR 6413 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_PRE_EQ_GAIN_ALG0_GAINALGNS145X2GAIN_MEMORYPAGE 0 /* Module EQ_Gain - Multiple Volume Control*/ #define MOD_EQ_GAIN_COUNT 16 #define MOD_EQ_GAIN_DEVICE "IC1" #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_ADDR 6414 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_EQ_GAIN_ALG0_GAINALGNS145X3GAIN_MEMORYPAGE 0 /* Module Master - Multiple Volume Control*/ #define MOD_MASTER_COUNT 16 #define MOD_MASTER_DEVICE "IC1" #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_ADDR 15211 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_VALUE SIGMASTUDIOTYPE_8_24_CONVERT(1) #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_TYPE SIGMASTUDIOTYPE_8_24 #define MOD_MASTER_ALG0_GAINALGNS145X1GAIN_MEMORYPAGE 0 /* Module IndirectParamAccessModule - IndirectParamAccessModule*/ #define MOD_INDIRECTPARAMACCESSMODULE_COUNT 3770 #define MOD_INDIRECTPARAMACCESSMODULE_DEVICE "IC1" #define MOD_INDIRECTPARAMACCESSMODULE_START_ADDRESS_ADDR 24584 #define MOD_INDIRECTPARAMACCESSMODULE_START_ADDRESS_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_NUM_OF_LOADS_AND_TRIGGER_ADDR 24585 #define MOD_INDIRECTPARAMACCESSMODULE_NUM_OF_LOADS_AND_TRIGGER_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_00_ADDR 24586 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_01_ADDR 24587 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_02_ADDR 24588 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_03_ADDR 24589 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_04_ADDR 24590 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_05_ADDR 24591 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_06_ADDR 24592 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_07_ADDR 24593 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_08_ADDR 24594 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_09_ADDR 24595 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_10_ADDR 24596 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_11_ADDR 24597 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_12_ADDR 24598 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_13_ADDR 24599 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_14_ADDR 24600 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_15_ADDR 24601 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_16_ADDR 24602 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_17_ADDR 24603 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_18_ADDR 24604 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_19_ADDR 24605 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_20_ADDR 24606 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_21_ADDR 24607 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_22_ADDR 24608 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_23_ADDR 24609 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_24_ADDR 24610 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_25_ADDR 24611 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_26_ADDR 24612 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_00_ADDR 24613 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_01_ADDR 24614 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_02_ADDR 24615 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_03_ADDR 24616 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_04_ADDR 24617 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_05_ADDR 24618 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_06_ADDR 24619 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_07_ADDR 24620 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_08_ADDR 24621 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_09_ADDR 24622 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_10_ADDR 24623 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_11_ADDR 24624 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_12_ADDR 24625 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_13_ADDR 24626 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_14_ADDR 24627 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_15_ADDR 24628 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_16_ADDR 24629 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_17_ADDR 24630 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_18_ADDR 24631 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_19_ADDR 24632 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_20_ADDR 24633 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_21_ADDR 24634 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_22_ADDR 24635 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_23_ADDR 24636 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_24_ADDR 24637 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_25_ADDR 24638 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_26_ADDR 24639 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_00_ADDR 24640 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_01_ADDR 24641 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_02_ADDR 24642 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_03_ADDR 24643 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_04_ADDR 24644 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_06_ADDR 24645 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_07_ADDR 24646 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_08_ADDR 24647 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_09_ADDR 24648 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_10_ADDR 24649 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_11_ADDR 24650 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_12_ADDR 24651 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_13_ADDR 24652 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_14_ADDR 24653 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_15_ADDR 24654 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_16_ADDR 24655 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_17_ADDR 24656 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_18_ADDR 24657 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_19_ADDR 24658 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_20_ADDR 24659 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_21_ADDR 24660 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_22_ADDR 24661 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_23_ADDR 24662 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_24_ADDR 24663 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_25_ADDR 24664 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_26_ADDR 24665 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_00_ADDR 24666 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_01_ADDR 24667 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_02_ADDR 24668 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_03_ADDR 24669 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_04_ADDR 24670 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_05_ADDR 24671 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_06_ADDR 24672 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_07_ADDR 24673 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_08_ADDR 24674 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_09_ADDR 24675 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_10_ADDR 24676 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_11_ADDR 24677 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_12_ADDR 24678 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_13_ADDR 24679 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_14_ADDR 24680 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_15_ADDR 24681 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_16_ADDR 24682 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_17_ADDR 24683 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_18_ADDR 24684 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_19_ADDR 24685 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_20_ADDR 24686 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_21_ADDR 24687 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_22_ADDR 24688 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_23_ADDR 24689 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_24_ADDR 24690 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_25_ADDR 24691 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_26_ADDR 24692 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_00_ADDR 24693 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_01_ADDR 24694 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_02_ADDR 24695 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_03_ADDR 24696 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_04_ADDR 24697 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_05_ADDR 24698 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_06_ADDR 24699 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_07_ADDR 24700 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_08_ADDR 24701 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_09_ADDR 24702 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_10_ADDR 24703 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_11_ADDR 24704 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_12_ADDR 24705 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_13_ADDR 24706 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_14_ADDR 24707 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_15_ADDR 24708 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_16_ADDR 24709 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_17_ADDR 24710 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_18_ADDR 24711 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_19_ADDR 24712 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_20_ADDR 24713 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_21_ADDR 24714 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_22_ADDR 24715 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_23_ADDR 24716 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_24_ADDR 24717 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_25_ADDR 24718 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_26_ADDR 24719 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_00_ADDR 24720 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_01_ADDR 24721 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_02_ADDR 24722 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_03_ADDR 24723 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_04_ADDR 24724 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_05_ADDR 24725 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_06_ADDR 24726 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_07_ADDR 24727 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_08_ADDR 24728 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_09_ADDR 24729 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_10_ADDR 24730 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_11_ADDR 24731 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_12_ADDR 24732 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_13_ADDR 24733 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_14_ADDR 24734 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_15_ADDR 24735 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_16_ADDR 24736 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_17_ADDR 24737 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_18_ADDR 24738 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_19_ADDR 24739 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_20_ADDR 24740 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_21_ADDR 24741 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_22_ADDR 24742 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_23_ADDR 24743 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_24_ADDR 24744 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_25_ADDR 24745 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_26_ADDR 24746 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_00_ADDR 24747 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_01_ADDR 24748 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_02_ADDR 24749 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_03_ADDR 24750 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_04_ADDR 24751 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_05_ADDR 24752 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_06_ADDR 24753 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_07_ADDR 24754 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_08_ADDR 24755 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_09_ADDR 24756 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_10_ADDR 24757 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_11_ADDR 24758 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_12_ADDR 24759 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_13_ADDR 24760 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_14_ADDR 24761 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_15_ADDR 24762 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_16_ADDR 24763 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_17_ADDR 24764 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_18_ADDR 24765 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_19_ADDR 24766 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_20_ADDR 24767 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_21_ADDR 24768 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_22_ADDR 24769 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_23_ADDR 24770 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_24_ADDR 24771 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_25_ADDR 24772 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_26_ADDR 24773 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_00_ADDR 24774 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_01_ADDR 24775 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_02_ADDR 24776 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_03_ADDR 24777 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_04_ADDR 24778 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_05_ADDR 24779 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_06_ADDR 24780 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_07_ADDR 24781 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_08_ADDR 24782 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_09_ADDR 24783 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_10_ADDR 24784 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_11_ADDR 24785 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_12_ADDR 24786 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_13_ADDR 24787 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_14_ADDR 24788 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_15_ADDR 24789 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_16_ADDR 24790 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_17_ADDR 24791 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_18_ADDR 24792 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_19_ADDR 24793 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_20_ADDR 24794 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_21_ADDR 24795 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_22_ADDR 24796 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_23_ADDR 24797 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_24_ADDR 24798 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_25_ADDR 24799 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_26_ADDR 24800 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_00_ADDR 24801 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_01_ADDR 24802 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_02_ADDR 24803 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_03_ADDR 24804 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_04_ADDR 24805 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_05_ADDR 24806 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_06_ADDR 24807 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_07_ADDR 24808 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_08_ADDR 24809 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_09_ADDR 24810 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_10_ADDR 24811 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_11_ADDR 24812 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_12_ADDR 24813 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_13_ADDR 24814 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_14_ADDR 24815 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_15_ADDR 24816 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_16_ADDR 24817 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_17_ADDR 24818 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_18_ADDR 24819 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_19_ADDR 24820 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_20_ADDR 24821 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_21_ADDR 24822 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_22_ADDR 24823 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_23_ADDR 24824 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_24_ADDR 24825 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_25_ADDR 24826 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_26_ADDR 24827 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_00_ADDR 24828 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_01_ADDR 24829 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_02_ADDR 24830 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_03_ADDR 24831 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_04_ADDR 24832 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_05_ADDR 24833 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_06_ADDR 24834 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_07_ADDR 24835 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_08_ADDR 24836 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_09_ADDR 24837 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_10_ADDR 24838 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_11_ADDR 24839 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_12_ADDR 24840 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_13_ADDR 24841 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_14_ADDR 24842 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_15_ADDR 24843 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_16_ADDR 24844 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_17_ADDR 24845 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_18_ADDR 24846 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_19_ADDR 24847 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_20_ADDR 24848 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_21_ADDR 24849 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_22_ADDR 24850 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_23_ADDR 24851 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_24_ADDR 24852 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_25_ADDR 24853 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_26_ADDR 24854 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_00_ADDR 24855 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_01_ADDR 24856 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_02_ADDR 24857 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_03_ADDR 24858 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_04_ADDR 24859 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_05_ADDR 24860 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_06_ADDR 24861 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_07_ADDR 24862 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_08_ADDR 24863 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_09_ADDR 24864 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_10_ADDR 24865 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_11_ADDR 24866 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_12_ADDR 24867 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_13_ADDR 24868 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_14_ADDR 24869 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_15_ADDR 24870 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_16_ADDR 24871 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_17_ADDR 24872 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_18_ADDR 24873 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_19_ADDR 24874 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_20_ADDR 24875 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_21_ADDR 24876 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_22_ADDR 24877 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_23_ADDR 24878 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_24_ADDR 24879 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_25_ADDR 24880 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_26_ADDR 24881 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_00_ADDR 24882 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_01_ADDR 24883 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_02_ADDR 24884 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_03_ADDR 24885 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_04_ADDR 24886 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_05_ADDR 24887 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_06_ADDR 24888 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_07_ADDR 24889 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_08_ADDR 24890 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_09_ADDR 24891 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_10_ADDR 24892 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_11_ADDR 24893 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_12_ADDR 24894 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_13_ADDR 24895 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_14_ADDR 24896 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_15_ADDR 24897 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_16_ADDR 24898 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_17_ADDR 24899 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_18_ADDR 24900 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_19_ADDR 24901 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_20_ADDR 24902 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_21_ADDR 24903 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_22_ADDR 24904 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_23_ADDR 24905 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_24_ADDR 24906 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_25_ADDR 24907 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_26_ADDR 24908 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_00_ADDR 24909 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_01_ADDR 24910 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_02_ADDR 24911 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_03_ADDR 24912 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_04_ADDR 24913 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_05_ADDR 24914 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_06_ADDR 24915 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_07_ADDR 24916 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_08_ADDR 24917 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_09_ADDR 24918 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_10_ADDR 24919 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_11_ADDR 24920 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_12_ADDR 24921 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_13_ADDR 24922 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_14_ADDR 24923 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_15_ADDR 24924 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_16_ADDR 24925 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_17_ADDR 24926 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_18_ADDR 24927 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_19_ADDR 24928 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_20_ADDR 24929 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_21_ADDR 24930 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_22_ADDR 24931 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_23_ADDR 24932 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_24_ADDR 24933 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_25_ADDR 24934 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_26_ADDR 24935 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_00_ADDR 24936 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_01_ADDR 24937 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_02_ADDR 24938 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_03_ADDR 24939 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_04_ADDR 24940 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_05_ADDR 24941 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_06_ADDR 24942 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_07_ADDR 24943 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_08_ADDR 24944 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_09_ADDR 24945 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_10_ADDR 24946 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_11_ADDR 24947 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_12_ADDR 24948 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_13_ADDR 24949 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_14_ADDR 24950 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_15_ADDR 24951 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_16_ADDR 24952 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_17_ADDR 24953 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_18_ADDR 24954 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_19_ADDR 24955 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_20_ADDR 24956 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_21_ADDR 24957 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_22_ADDR 24958 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_23_ADDR 24959 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_24_ADDR 24960 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_25_ADDR 24961 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_26_ADDR 24962 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_00_ADDR 24963 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_01_ADDR 24964 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_02_ADDR 24965 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_03_ADDR 24966 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_04_ADDR 24967 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_05_ADDR 24968 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_06_ADDR 24969 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_07_ADDR 24970 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_08_ADDR 24971 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_09_ADDR 24972 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_10_ADDR 24973 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_11_ADDR 24974 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_12_ADDR 24975 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_13_ADDR 24976 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_14_ADDR 24977 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_15_ADDR 24978 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_16_ADDR 24979 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_17_ADDR 24980 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_18_ADDR 24981 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_19_ADDR 24982 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_20_ADDR 24983 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_21_ADDR 24984 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_22_ADDR 24985 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_23_ADDR 24986 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_24_ADDR 24987 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_25_ADDR 24988 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_26_ADDR 24989 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_00_ADDR 24990 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_01_ADDR 24991 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_02_ADDR 24992 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_03_ADDR 24993 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_04_ADDR 24994 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_05_ADDR 24995 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_06_ADDR 24996 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_07_ADDR 24997 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_08_ADDR 24998 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_09_ADDR 24999 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_10_ADDR 25000 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_11_ADDR 25001 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_12_ADDR 25002 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_13_ADDR 25003 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_14_ADDR 25004 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_15_ADDR 25005 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_16_ADDR 25006 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_17_ADDR 25007 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_18_ADDR 25008 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_19_ADDR 25009 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_20_ADDR 25010 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_21_ADDR 25011 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_22_ADDR 25012 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_23_ADDR 25013 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_24_ADDR 25014 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_25_ADDR 25015 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_26_ADDR 25016 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_05_ADDR 25017 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_18_ADDR 25018 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_DELAY1_6_DELAY_ADDR 25019 #define MOD_INDIRECTPARAMACCESSMODULE_DELAY1_6_DELAY_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_DELAY1_9_DELAY_ADDR 25020 #define MOD_INDIRECTPARAMACCESSMODULE_DELAY1_9_DELAY_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_TCONST_ADDR 25021 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_TCONST_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_HOLD_ADDR 25022 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_HOLD_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_DECAY_ADDR 25023 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_DECAY_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_RMS_ADDR 25024 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_RMS_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_HELD_DB_ADDR 25025 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_HELD_DB_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_READ_LEVEL1_1_HOLD_COUNT_ADDR 25026 #define MOD_INDIRECTPARAMACCESSMODULE_READ_LEVEL1_1_HOLD_COUNT_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_READ_LEVEL1_1_X_SQ_ADDR 25027 #define MOD_INDIRECTPARAMACCESSMODULE_READ_LEVEL1_1_X_SQ_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_READ_LEVEL1_1_DBOUT_ADDR 25028 #define MOD_INDIRECTPARAMACCESSMODULE_READ_LEVEL1_1_DBOUT_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_X_ADDR 25029 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_X_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_X_LO_ADDR 25030 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_X_LO_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_LINX_ADDR 25031 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_LINX_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_LINX_LO_ADDR 25032 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_LINX_LO_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MASTER_GAIN_ADDR 25033 #define MOD_INDIRECTPARAMACCESSMODULE_MASTER_GAIN_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_CHANNEL_GAIN_GAIN_ADDR 25034 #define MOD_INDIRECTPARAMACCESSMODULE_CHANNEL_GAIN_GAIN_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_CHANNEL_GAIN_TARGET_ADDR 25035 #define MOD_INDIRECTPARAMACCESSMODULE_CHANNEL_GAIN_TARGET_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_CHANNEL_GAIN_SLEW_MODE_ADDR 25036 #define MOD_INDIRECTPARAMACCESSMODULE_CHANNEL_GAIN_SLEW_MODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_X_SQ_ADDR 25037 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_X_SQ_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_DBOUT_ADDR 25038 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_DBOUT_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_X_ADDR 25039 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_X_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_X_LO_ADDR 25040 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_X_LO_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_LINX_ADDR 25041 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_LINX_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_LINX_LO_ADDR 25042 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_1_LINX_LO_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MASTER_GAIN_ADDR 25043 #define MOD_INDIRECTPARAMACCESSMODULE_MASTER_GAIN_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_CHANNEL_GAIN_GAIN_ADDR 25044 #define MOD_INDIRECTPARAMACCESSMODULE_CHANNEL_GAIN_GAIN_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_CHANNEL_GAIN_TARGET_ADDR 25045 #define MOD_INDIRECTPARAMACCESSMODULE_CHANNEL_GAIN_TARGET_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_TARG_A2_1_ADDR 25046 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_TARG_A1_1_ADDR 25047 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_CURR_B2_1_ADDR 25048 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_CURR_B1_1_ADDR 25049 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_CURR_B0_1_ADDR 25050 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_CURR_A2_1_ADDR 25051 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_CURR_A1_1_ADDR 25052 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2__SLEWMODE_ADDR 25053 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_TARG_B2_1_ADDR 25054 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_TARG_B1_1_ADDR 25055 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_TARG_B0_1_ADDR 25056 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_TARG_A2_1_ADDR 25057 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_TARG_A1_1_ADDR 25058 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_2_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_CURR_B2_1_ADDR 25059 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_CURR_B1_1_ADDR 25060 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_CURR_B0_1_ADDR 25061 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_CURR_A2_1_ADDR 25062 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_CURR_A1_1_ADDR 25063 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3__SLEWMODE_ADDR 25064 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_TARG_B2_1_ADDR 25065 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_TARG_B1_1_ADDR 25066 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_TARG_B0_1_ADDR 25067 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_TARG_A2_1_ADDR 25068 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_TARG_A1_1_ADDR 25069 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_3_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_CURR_B2_1_ADDR 25070 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_CURR_B1_1_ADDR 25071 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_CURR_B0_1_ADDR 25072 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_CURR_A2_1_ADDR 25073 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_CURR_A1_1_ADDR 25074 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4__SLEWMODE_ADDR 25075 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_TARG_B2_1_ADDR 25076 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_TARG_B1_1_ADDR 25077 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_TARG_B0_1_ADDR 25078 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_TARG_A2_1_ADDR 25079 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_TARG_A1_1_ADDR 25080 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_4_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_CURR_B2_1_ADDR 25081 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_CURR_B1_1_ADDR 25082 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_CURR_B0_1_ADDR 25083 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_CURR_A2_1_ADDR 25084 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_CURR_A1_1_ADDR 25085 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5__SLEWMODE_ADDR 25086 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_TARG_B2_1_ADDR 25087 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_TARG_B1_1_ADDR 25088 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_TARG_B0_1_ADDR 25089 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_TARG_A2_1_ADDR 25090 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_TARG_A1_1_ADDR 25091 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_5_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_CURR_B2_1_ADDR 25092 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_CURR_B1_1_ADDR 25093 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_CURR_B0_1_ADDR 25094 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_CURR_A2_1_ADDR 25095 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_CURR_A1_1_ADDR 25096 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6__SLEWMODE_ADDR 25097 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_TARG_B2_1_ADDR 25098 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_TARG_B1_1_ADDR 25099 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_TARG_B0_1_ADDR 25100 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_TARG_A2_1_ADDR 25101 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_TARG_A1_1_ADDR 25102 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_6_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_CURR_B2_1_ADDR 25103 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_CURR_B1_1_ADDR 25104 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_CURR_B0_1_ADDR 25105 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_CURR_A2_1_ADDR 25106 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_CURR_A1_1_ADDR 25107 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7__SLEWMODE_ADDR 25108 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_TARG_B2_1_ADDR 25109 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_TARG_B1_1_ADDR 25110 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_TARG_B0_1_ADDR 25111 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_TARG_A2_1_ADDR 25112 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_TARG_A1_1_ADDR 25113 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_7_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_CURR_B2_1_ADDR 25114 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_CURR_B1_1_ADDR 25115 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_CURR_B0_1_ADDR 25116 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_CURR_A2_1_ADDR 25117 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_CURR_A1_1_ADDR 25118 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8__SLEWMODE_ADDR 25119 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_TARG_B2_1_ADDR 25120 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_TARG_B1_1_ADDR 25121 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_TARG_B0_1_ADDR 25122 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_TARG_A2_1_ADDR 25123 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_TARG_A1_1_ADDR 25124 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_8_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_CURR_B2_1_ADDR 25125 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_CURR_B1_1_ADDR 25126 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_CURR_B0_1_ADDR 25127 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_CURR_A2_1_ADDR 25128 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_CURR_A1_1_ADDR 25129 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9__SLEWMODE_ADDR 25130 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_TARG_B2_1_ADDR 25131 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_TARG_B1_1_ADDR 25132 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_TARG_B0_1_ADDR 25133 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_TARG_A2_1_ADDR 25134 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_TARG_A1_1_ADDR 25135 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_9_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_CURR_B2_1_ADDR 25136 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_CURR_B1_1_ADDR 25137 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_CURR_B0_1_ADDR 25138 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_CURR_A2_1_ADDR 25139 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_CURR_A1_1_ADDR 25140 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10__SLEWMODE_ADDR 25141 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_TARG_B2_1_ADDR 25142 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_TARG_B1_1_ADDR 25143 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_TARG_B0_1_ADDR 25144 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_TARG_A2_1_ADDR 25145 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_TARG_A1_1_ADDR 25146 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_10_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_CURR_B2_1_ADDR 25147 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_CURR_B1_1_ADDR 25148 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_CURR_B0_1_ADDR 25149 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_CURR_A2_1_ADDR 25150 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_CURR_A1_1_ADDR 25151 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11__SLEWMODE_ADDR 25152 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_TARG_B2_1_ADDR 25153 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_TARG_B1_1_ADDR 25154 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_TARG_B0_1_ADDR 25155 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_TARG_A2_1_ADDR 25156 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_TARG_A1_1_ADDR 25157 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_11_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_CURR_B2_1_ADDR 25158 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_CURR_B1_1_ADDR 25159 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_CURR_B0_1_ADDR 25160 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_CURR_A2_1_ADDR 25161 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_CURR_A1_1_ADDR 25162 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12__SLEWMODE_ADDR 25163 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_TARG_B2_1_ADDR 25164 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_TARG_B1_1_ADDR 25165 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_TARG_B0_1_ADDR 25166 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_TARG_A2_1_ADDR 25167 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_TARG_A1_1_ADDR 25168 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_12_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_CURR_B2_1_ADDR 25169 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_CURR_B1_1_ADDR 25170 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_CURR_B0_1_ADDR 25171 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_CURR_A2_1_ADDR 25172 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_CURR_A1_1_ADDR 25173 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13__SLEWMODE_ADDR 25174 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_TARG_B2_1_ADDR 25175 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_TARG_B1_1_ADDR 25176 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_TARG_B0_1_ADDR 25177 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_TARG_A2_1_ADDR 25178 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_TARG_A1_1_ADDR 25179 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_13_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_CURR_B2_1_ADDR 25180 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_CURR_B1_1_ADDR 25181 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_CURR_B0_1_ADDR 25182 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_CURR_A2_1_ADDR 25183 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_CURR_A1_1_ADDR 25184 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14__SLEWMODE_ADDR 25185 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_TARG_B2_1_ADDR 25186 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_TARG_B1_1_ADDR 25187 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_TARG_B0_1_ADDR 25188 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_TARG_A2_1_ADDR 25189 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_TARG_A1_1_ADDR 25190 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_14_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_CURR_B2_1_ADDR 25191 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_CURR_B1_1_ADDR 25192 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_CURR_B0_1_ADDR 25193 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_CURR_A2_1_ADDR 25194 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_CURR_A1_1_ADDR 25195 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15__SLEWMODE_ADDR 25196 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_TARG_B2_1_ADDR 25197 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_TARG_B1_1_ADDR 25198 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_TARG_B0_1_ADDR 25199 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_TARG_A2_1_ADDR 25200 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_TARG_A1_1_ADDR 25201 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_15_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_CURR_B2_1_ADDR 25202 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_CURR_B1_1_ADDR 25203 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_CURR_B0_1_ADDR 25204 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_CURR_A2_1_ADDR 25205 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_CURR_A1_1_ADDR 25206 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16__SLEWMODE_ADDR 25207 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_TARG_B2_1_ADDR 25208 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_TARG_B1_1_ADDR 25209 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_TARG_B0_1_ADDR 25210 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_TARG_A2_1_ADDR 25211 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_TARG_A1_1_ADDR 25212 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_16_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_CURR_B2_1_ADDR 25213 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_CURR_B1_1_ADDR 25214 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_CURR_B0_1_ADDR 25215 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_CURR_A2_1_ADDR 25216 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_CURR_A1_1_ADDR 25217 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17__SLEWMODE_ADDR 25218 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_TARG_B2_1_ADDR 25219 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_TARG_B1_1_ADDR 25220 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_TARG_B0_1_ADDR 25221 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_TARG_A2_1_ADDR 25222 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_TARG_A1_1_ADDR 25223 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_17_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_CURR_B2_1_ADDR 25224 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_CURR_B1_1_ADDR 25225 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_CURR_B0_1_ADDR 25226 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_CURR_A2_1_ADDR 25227 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_CURR_A1_1_ADDR 25228 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18__SLEWMODE_ADDR 25229 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_TARG_B2_1_ADDR 25230 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_TARG_B1_1_ADDR 25231 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_TARG_B0_1_ADDR 25232 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_TARG_A2_1_ADDR 25233 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_TARG_A1_1_ADDR 25234 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_18_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_CURR_B2_1_ADDR 25235 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_CURR_B1_1_ADDR 25236 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_CURR_B0_1_ADDR 25237 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_CURR_A2_1_ADDR 25238 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_CURR_A1_1_ADDR 25239 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19__SLEWMODE_ADDR 25240 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_TARG_B2_1_ADDR 25241 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_TARG_B1_1_ADDR 25242 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_TARG_B0_1_ADDR 25243 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_TARG_A2_1_ADDR 25244 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_TARG_A1_1_ADDR 25245 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_19_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_CURR_B2_1_ADDR 25246 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_CURR_B1_1_ADDR 25247 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_CURR_B0_1_ADDR 25248 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_CURR_A2_1_ADDR 25249 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_CURR_A1_1_ADDR 25250 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20__SLEWMODE_ADDR 25251 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_TARG_B2_1_ADDR 25252 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_TARG_B1_1_ADDR 25253 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_TARG_B0_1_ADDR 25254 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_TARG_A2_1_ADDR 25255 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_TARG_A1_1_ADDR 25256 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_20_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_CURR_B2_1_ADDR 25257 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_CURR_B1_1_ADDR 25258 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_CURR_B0_1_ADDR 25259 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_CURR_A2_1_ADDR 25260 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_CURR_A1_1_ADDR 25261 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21__SLEWMODE_ADDR 25262 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_TARG_B2_1_ADDR 25263 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_TARG_B1_1_ADDR 25264 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_TARG_B0_1_ADDR 25265 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_TARG_A2_1_ADDR 25266 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_TARG_A1_1_ADDR 25267 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_21_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_CURR_B2_1_ADDR 25268 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_CURR_B1_1_ADDR 25269 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_CURR_B0_1_ADDR 25270 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_CURR_A2_1_ADDR 25271 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_CURR_A1_1_ADDR 25272 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22__SLEWMODE_ADDR 25273 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_TARG_B2_1_ADDR 25274 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_TARG_B1_1_ADDR 25275 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_TARG_B0_1_ADDR 25276 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_TARG_A2_1_ADDR 25277 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_TARG_A1_1_ADDR 25278 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_22_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_CURR_B2_1_ADDR 25279 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_CURR_B1_1_ADDR 25280 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_CURR_B0_1_ADDR 25281 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_CURR_A2_1_ADDR 25282 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_CURR_A1_1_ADDR 25283 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23__SLEWMODE_ADDR 25284 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_TARG_B2_1_ADDR 25285 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_TARG_B1_1_ADDR 25286 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_TARG_B0_1_ADDR 25287 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_TARG_A2_1_ADDR 25288 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_TARG_A1_1_ADDR 25289 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_23_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_CURR_B2_1_ADDR 25290 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_CURR_B1_1_ADDR 25291 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_CURR_B0_1_ADDR 25292 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_CURR_A2_1_ADDR 25293 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_CURR_A1_1_ADDR 25294 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24__SLEWMODE_ADDR 25295 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_TARG_B2_1_ADDR 25296 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_TARG_B1_1_ADDR 25297 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_TARG_B0_1_ADDR 25298 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_TARG_A2_1_ADDR 25299 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_TARG_A1_1_ADDR 25300 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_24_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_CURR_B2_1_ADDR 25301 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_CURR_B1_1_ADDR 25302 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_CURR_B0_1_ADDR 25303 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_CURR_A2_1_ADDR 25304 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_CURR_A1_1_ADDR 25305 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25__SLEWMODE_ADDR 25306 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_TARG_B2_1_ADDR 25307 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_TARG_B1_1_ADDR 25308 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_TARG_B0_1_ADDR 25309 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_TARG_A2_1_ADDR 25310 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_TARG_A1_1_ADDR 25311 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_25_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_CURR_B2_1_ADDR 25312 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_CURR_B1_1_ADDR 25313 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_CURR_B0_1_ADDR 25314 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_CURR_A2_1_ADDR 25315 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_CURR_A1_1_ADDR 25316 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26__SLEWMODE_ADDR 25317 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_TARG_B2_1_ADDR 25318 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_TARG_B1_1_ADDR 25319 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_TARG_B0_1_ADDR 25320 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_TARG_A2_1_ADDR 25321 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_TARG_A1_1_ADDR 25322 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_26_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_CURR_B2_1_ADDR 25323 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_CURR_B1_1_ADDR 25324 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_CURR_B0_1_ADDR 25325 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_CURR_A2_1_ADDR 25326 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_CURR_A1_1_ADDR 25327 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27__SLEWMODE_ADDR 25328 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_TARG_B2_1_ADDR 25329 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_TARG_B1_1_ADDR 25330 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_TARG_B0_1_ADDR 25331 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_TARG_A2_1_ADDR 25332 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_TARG_A1_1_ADDR 25333 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_27_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_CURR_B2_1_ADDR 25334 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_CURR_B1_1_ADDR 25335 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_CURR_B0_1_ADDR 25336 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_CURR_A2_1_ADDR 25337 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_CURR_A1_1_ADDR 25338 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28__SLEWMODE_ADDR 25339 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_TARG_B2_1_ADDR 25340 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_TARG_B1_1_ADDR 25341 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_TARG_B0_1_ADDR 25342 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_TARG_A2_1_ADDR 25343 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_TARG_A1_1_ADDR 25344 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_28_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_CURR_B2_1_ADDR 25345 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_CURR_B1_1_ADDR 25346 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_CURR_B0_1_ADDR 25347 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_CURR_A2_1_ADDR 25348 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_CURR_A1_1_ADDR 25349 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29__SLEWMODE_ADDR 25350 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_TARG_B2_1_ADDR 25351 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_TARG_B1_1_ADDR 25352 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_TARG_B0_1_ADDR 25353 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_TARG_A2_1_ADDR 25354 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_TARG_A1_1_ADDR 25355 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_29_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_CURR_B2_1_ADDR 25356 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_CURR_B1_1_ADDR 25357 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_CURR_B0_1_ADDR 25358 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_CURR_A2_1_ADDR 25359 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_CURR_A1_1_ADDR 25360 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30__SLEWMODE_ADDR 25361 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_TARG_B2_1_ADDR 25362 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_TARG_B1_1_ADDR 25363 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_TARG_B0_1_ADDR 25364 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_TARG_A2_1_ADDR 25365 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_TARG_A1_1_ADDR 25366 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_30_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_CURR_B2_1_ADDR 25367 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_CURR_B1_1_ADDR 25368 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_CURR_B0_1_ADDR 25369 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_CURR_A2_1_ADDR 25370 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_CURR_A1_1_ADDR 25371 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31__SLEWMODE_ADDR 25372 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_TARG_B2_1_ADDR 25373 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_TARG_B1_1_ADDR 25374 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_TARG_B0_1_ADDR 25375 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_TARG_A2_1_ADDR 25376 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_TARG_A1_1_ADDR 25377 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_31_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_CURR_B2_1_ADDR 25378 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_CURR_B1_1_ADDR 25379 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_CURR_B0_1_ADDR 25380 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_CURR_A2_1_ADDR 25381 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_CURR_A1_1_ADDR 25382 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32__SLEWMODE_ADDR 25383 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_TARG_B2_1_ADDR 25384 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_TARG_B1_1_ADDR 25385 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_TARG_B0_1_ADDR 25386 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_TARG_A2_1_ADDR 25387 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_TARG_A1_1_ADDR 25388 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_32_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_CURR_B2_1_ADDR 25389 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_CURR_B1_1_ADDR 25390 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_CURR_B0_1_ADDR 25391 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_CURR_A2_1_ADDR 25392 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_CURR_A1_1_ADDR 25393 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33__SLEWMODE_ADDR 25394 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_TARG_B2_1_ADDR 25395 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_TARG_B1_1_ADDR 25396 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_TARG_B0_1_ADDR 25397 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_TARG_A2_1_ADDR 25398 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_TARG_A1_1_ADDR 25399 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_33_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_CURR_B2_1_ADDR 25400 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_CURR_B1_1_ADDR 25401 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_CURR_B0_1_ADDR 25402 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_CURR_A2_1_ADDR 25403 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_CURR_A1_1_ADDR 25404 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34__SLEWMODE_ADDR 25405 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_TARG_B2_1_ADDR 25406 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_TARG_B1_1_ADDR 25407 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_TARG_B0_1_ADDR 25408 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_TARG_A2_1_ADDR 25409 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_TARG_A1_1_ADDR 25410 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_CURR_B2_1_ADDR 25411 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_CURR_B1_1_ADDR 25412 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_CURR_B0_1_ADDR 25413 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_CURR_A2_1_ADDR 25414 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_CURR_A1_1_ADDR 25415 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35__SLEWMODE_ADDR 25416 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_TARG_B2_1_ADDR 25417 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_TARG_B1_1_ADDR 25418 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_TARG_B0_1_ADDR 25419 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_TARG_A2_1_ADDR 25420 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_TARG_A1_1_ADDR 25421 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_CURR_B2_1_ADDR 25422 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_CURR_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_CURR_B1_1_ADDR 25423 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_CURR_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_CURR_B0_1_ADDR 25424 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_CURR_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_CURR_A2_1_ADDR 25425 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_CURR_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_CURR_A1_1_ADDR 25426 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_CURR_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36__SLEWMODE_ADDR 25427 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36__SLEWMODE_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_TARG_B2_1_ADDR 25428 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_TARG_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_TARG_B1_1_ADDR 25429 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_TARG_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_TARG_B0_1_ADDR 25430 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_TARG_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_TARG_A2_1_ADDR 25431 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_TARG_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_TARG_A1_1_ADDR 25432 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_TARG_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_DELAY1_1_DELAY_ADDR 25433 #define MOD_INDIRECTPARAMACCESSMODULE_DELAY1_1_DELAY_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_27_ADDR 25434 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_28_ADDR 25435 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_29_ADDR 25436 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_30_ADDR 25437 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_31_ADDR 25438 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_00_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_27_ADDR 25439 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_28_ADDR 25440 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_29_ADDR 25441 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_30_ADDR 25442 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_31_ADDR 25443 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_01_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_27_ADDR 25444 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_28_ADDR 25445 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_29_ADDR 25446 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_30_ADDR 25447 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_31_ADDR 25448 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_02_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_27_ADDR 25449 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_28_ADDR 25450 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_29_ADDR 25451 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_30_ADDR 25452 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_31_ADDR 25453 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_03_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_27_ADDR 25454 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_28_ADDR 25455 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_29_ADDR 25456 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_30_ADDR 25457 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_31_ADDR 25458 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_04_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_27_ADDR 25459 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_28_ADDR 25460 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_29_ADDR 25461 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_30_ADDR 25462 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_31_ADDR 25463 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_05_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_27_ADDR 25464 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_28_ADDR 25465 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_29_ADDR 25466 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_30_ADDR 25467 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_31_ADDR 25468 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_06_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_27_ADDR 25469 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_28_ADDR 25470 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_29_ADDR 25471 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_30_ADDR 25472 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_31_ADDR 25473 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_07_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_27_ADDR 25474 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_28_ADDR 25475 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_29_ADDR 25476 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_30_ADDR 25477 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_31_ADDR 25478 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_08_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_27_ADDR 25479 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_28_ADDR 25480 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_29_ADDR 25481 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_30_ADDR 25482 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_31_ADDR 25483 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_09_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_27_ADDR 25484 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_28_ADDR 25485 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_29_ADDR 25486 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_30_ADDR 25487 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_31_ADDR 25488 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_10_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_27_ADDR 25489 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_28_ADDR 25490 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_29_ADDR 25491 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_30_ADDR 25492 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_31_ADDR 25493 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_11_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_27_ADDR 25494 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_28_ADDR 25495 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_29_ADDR 25496 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_30_ADDR 25497 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_31_ADDR 25498 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_12_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_27_ADDR 25499 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_28_ADDR 25500 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_29_ADDR 25501 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_30_ADDR 25502 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_31_ADDR 25503 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_13_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_27_ADDR 25504 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_28_ADDR 25505 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_29_ADDR 25506 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_30_ADDR 25507 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_31_ADDR 25508 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_14_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_27_ADDR 25509 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_28_ADDR 25510 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_29_ADDR 25511 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_30_ADDR 25512 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_31_ADDR 25513 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER1_VOL_15_31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_TCONST_ADDR 25514 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_TCONST_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_HOLD_ADDR 25515 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_HOLD_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_DECAY_ADDR 25516 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_DECAY_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_RMS_ADDR 25517 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_RMS_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_HELD_DB_ADDR 25518 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_HELD_DB_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_HOLD_COUNT_ADDR 25519 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_HOLD_COUNT_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_X_SQ_ADDR 25520 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_X_SQ_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_DBOUT_ADDR 25521 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_DBOUT_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_X_ADDR 25522 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_X_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_X_LO_ADDR 25523 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_X_LO_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_LINX_ADDR 25524 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_LINX_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_LINX_LO_ADDR 25525 #define MOD_INDIRECTPARAMACCESSMODULE_LEVEL1_36_LINX_LO_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B2_1_ADDR 25526 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B1_1_ADDR 25527 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B0_1_ADDR 25528 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A2_1_ADDR 25529 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A1_1_ADDR 25530 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B2_2_ADDR 25531 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B2_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B1_2_ADDR 25532 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B1_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B0_2_ADDR 25533 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B0_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A2_2_ADDR 25534 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A2_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A1_2_ADDR 25535 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A1_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B2_3_ADDR 25536 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B2_3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B1_3_ADDR 25537 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B1_3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B0_3_ADDR 25538 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B0_3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A2_3_ADDR 25539 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A2_3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A1_3_ADDR 25540 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A1_3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B2_4_ADDR 25541 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B2_4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B1_4_ADDR 25542 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B1_4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B0_4_ADDR 25543 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B0_4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A2_4_ADDR 25544 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A2_4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A1_4_ADDR 25545 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A1_4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B2_5_ADDR 25546 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B2_5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B1_5_ADDR 25547 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B1_5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B0_5_ADDR 25548 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_B0_5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A2_5_ADDR 25549 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A2_5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A1_5_ADDR 25550 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_36_A1_5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B2_1_ADDR 25551 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B1_1_ADDR 25552 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B0_1_ADDR 25553 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A2_1_ADDR 25554 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A1_1_ADDR 25555 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B2_2_ADDR 25556 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B2_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B1_2_ADDR 25557 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B1_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B0_2_ADDR 25558 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B0_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A2_2_ADDR 25559 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A2_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A1_2_ADDR 25560 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A1_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B2_3_ADDR 25561 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B2_3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B1_3_ADDR 25562 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B1_3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B0_3_ADDR 25563 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B0_3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A2_3_ADDR 25564 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A2_3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A1_3_ADDR 25565 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A1_3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B2_4_ADDR 25566 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B2_4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B1_4_ADDR 25567 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B1_4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B0_4_ADDR 25568 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B0_4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A2_4_ADDR 25569 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A2_4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A1_4_ADDR 25570 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A1_4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B2_5_ADDR 25571 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B2_5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B1_5_ADDR 25572 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B1_5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B0_5_ADDR 25573 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_B0_5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A2_5_ADDR 25574 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A2_5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A1_5_ADDR 25575 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_35_A1_5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B2_1_ADDR 25576 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B1_1_ADDR 25577 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B0_1_ADDR 25578 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B0_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_A2_1_ADDR 25579 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_A2_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_A1_1_ADDR 25580 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_A1_1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B2_2_ADDR 25581 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B2_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B1_2_ADDR 25582 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B1_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B0_2_ADDR 25583 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_B0_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_A2_2_ADDR 25584 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_A2_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_A1_2_ADDR 25585 #define MOD_INDIRECTPARAMACCESSMODULE_PRE_GEN_FILTER1_34_A1_2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_00_ADDR 25586 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_01_ADDR 25587 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_02_ADDR 25588 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_03_ADDR 25589 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_04_ADDR 25590 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_05_ADDR 25591 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_06_ADDR 25592 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_07_ADDR 25593 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_08_ADDR 25594 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_09_ADDR 25595 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_10_ADDR 25596 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_11_ADDR 25597 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_12_ADDR 25598 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_13_ADDR 25599 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_14_ADDR 25600 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_15_ADDR 25601 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_00_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_00_ADDR 25602 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_01_ADDR 25603 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_02_ADDR 25604 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_03_ADDR 25605 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_04_ADDR 25606 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_05_ADDR 25607 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_06_ADDR 25608 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_07_ADDR 25609 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_08_ADDR 25610 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_09_ADDR 25611 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_10_ADDR 25612 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_11_ADDR 25613 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_12_ADDR 25614 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_13_ADDR 25615 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_14_ADDR 25616 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_15_ADDR 25617 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_01_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_00_ADDR 25618 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_01_ADDR 25619 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_02_ADDR 25620 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_03_ADDR 25621 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_04_ADDR 25622 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_05_ADDR 25623 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_06_ADDR 25624 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_07_ADDR 25625 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_08_ADDR 25626 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_09_ADDR 25627 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_10_ADDR 25628 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_11_ADDR 25629 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_12_ADDR 25630 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_13_ADDR 25631 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_14_ADDR 25632 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_15_ADDR 25633 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_02_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_00_ADDR 25634 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_01_ADDR 25635 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_02_ADDR 25636 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_03_ADDR 25637 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_04_ADDR 25638 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_05_ADDR 25639 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_06_ADDR 25640 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_07_ADDR 25641 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_08_ADDR 25642 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_09_ADDR 25643 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_10_ADDR 25644 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_11_ADDR 25645 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_12_ADDR 25646 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_13_ADDR 25647 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_14_ADDR 25648 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_15_ADDR 25649 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_03_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_00_ADDR 25650 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_01_ADDR 25651 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_02_ADDR 25652 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_03_ADDR 25653 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_04_ADDR 25654 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_05_ADDR 25655 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_06_ADDR 25656 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_07_ADDR 25657 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_08_ADDR 25658 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_09_ADDR 25659 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_10_ADDR 25660 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_11_ADDR 25661 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_12_ADDR 25662 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_13_ADDR 25663 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_14_ADDR 25664 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_15_ADDR 25665 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_04_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_00_ADDR 25666 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_01_ADDR 25667 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_02_ADDR 25668 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_03_ADDR 25669 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_04_ADDR 25670 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_05_ADDR 25671 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_06_ADDR 25672 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_07_ADDR 25673 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_08_ADDR 25674 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_09_ADDR 25675 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_10_ADDR 25676 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_11_ADDR 25677 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_12_ADDR 25678 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_13_ADDR 25679 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_14_ADDR 25680 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_15_ADDR 25681 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_05_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_00_ADDR 25682 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_01_ADDR 25683 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_02_ADDR 25684 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_03_ADDR 25685 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_04_ADDR 25686 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_05_ADDR 25687 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_06_ADDR 25688 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_07_ADDR 25689 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_08_ADDR 25690 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_09_ADDR 25691 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_10_ADDR 25692 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_11_ADDR 25693 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_12_ADDR 25694 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_13_ADDR 25695 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_14_ADDR 25696 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_15_ADDR 25697 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_06_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_00_ADDR 25698 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_01_ADDR 25699 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_02_ADDR 25700 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_03_ADDR 25701 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_04_ADDR 25702 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_05_ADDR 25703 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_06_ADDR 25704 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_07_ADDR 25705 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_08_ADDR 25706 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_09_ADDR 25707 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_10_ADDR 25708 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_11_ADDR 25709 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_12_ADDR 25710 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_13_ADDR 25711 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_14_ADDR 25712 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_15_ADDR 25713 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_07_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_00_ADDR 25714 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_01_ADDR 25715 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_02_ADDR 25716 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_03_ADDR 25717 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_04_ADDR 25718 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_05_ADDR 25719 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_06_ADDR 25720 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_07_ADDR 25721 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_08_ADDR 25722 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_09_ADDR 25723 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_10_ADDR 25724 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_11_ADDR 25725 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_12_ADDR 25726 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_13_ADDR 25727 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_14_ADDR 25728 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_15_ADDR 25729 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_08_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_00_ADDR 25730 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_01_ADDR 25731 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_02_ADDR 25732 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_03_ADDR 25733 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_04_ADDR 25734 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_05_ADDR 25735 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_06_ADDR 25736 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_07_ADDR 25737 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_08_ADDR 25738 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_09_ADDR 25739 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_10_ADDR 25740 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_11_ADDR 25741 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_12_ADDR 25742 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_13_ADDR 25743 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_14_ADDR 25744 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_15_ADDR 25745 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_09_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_00_ADDR 25746 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_01_ADDR 25747 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_02_ADDR 25748 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_03_ADDR 25749 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_04_ADDR 25750 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_05_ADDR 25751 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_06_ADDR 25752 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_07_ADDR 25753 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_08_ADDR 25754 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_09_ADDR 25755 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_10_ADDR 25756 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_11_ADDR 25757 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_12_ADDR 25758 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_13_ADDR 25759 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_14_ADDR 25760 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_15_ADDR 25761 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_10_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_00_ADDR 25762 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_01_ADDR 25763 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_02_ADDR 25764 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_03_ADDR 25765 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_04_ADDR 25766 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_05_ADDR 25767 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_06_ADDR 25768 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_07_ADDR 25769 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_08_ADDR 25770 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_09_ADDR 25771 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_10_ADDR 25772 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_11_ADDR 25773 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_12_ADDR 25774 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_13_ADDR 25775 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_14_ADDR 25776 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_15_ADDR 25777 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_11_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_00_ADDR 25778 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_01_ADDR 25779 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_02_ADDR 25780 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_03_ADDR 25781 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_04_ADDR 25782 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_05_ADDR 25783 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_06_ADDR 25784 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_07_ADDR 25785 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_08_ADDR 25786 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_09_ADDR 25787 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_10_ADDR 25788 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_11_ADDR 25789 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_12_ADDR 25790 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_13_ADDR 25791 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_14_ADDR 25792 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_15_ADDR 25793 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_12_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_00_ADDR 25794 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_01_ADDR 25795 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_02_ADDR 25796 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_03_ADDR 25797 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_04_ADDR 25798 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_05_ADDR 25799 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_06_ADDR 25800 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_07_ADDR 25801 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_08_ADDR 25802 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_09_ADDR 25803 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_10_ADDR 25804 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_11_ADDR 25805 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_12_ADDR 25806 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_13_ADDR 25807 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_14_ADDR 25808 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_15_ADDR 25809 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_13_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_00_ADDR 25810 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_01_ADDR 25811 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_02_ADDR 25812 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_03_ADDR 25813 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_04_ADDR 25814 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_05_ADDR 25815 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_06_ADDR 25816 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_07_ADDR 25817 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_08_ADDR 25818 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_09_ADDR 25819 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_10_ADDR 25820 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_11_ADDR 25821 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_12_ADDR 25822 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_13_ADDR 25823 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_14_ADDR 25824 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_15_ADDR 25825 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_14_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_00_ADDR 25826 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_00_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_01_ADDR 25827 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_01_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_02_ADDR 25828 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_02_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_03_ADDR 25829 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_03_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_04_ADDR 25830 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_04_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_05_ADDR 25831 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_05_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_06_ADDR 25832 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_06_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_07_ADDR 25833 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_07_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_08_ADDR 25834 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_08_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_09_ADDR 25835 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_09_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_10_ADDR 25836 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_11_ADDR 25837 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_12_ADDR 25838 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_13_ADDR 25839 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_14_ADDR 25840 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_15_ADDR 25841 #define MOD_INDIRECTPARAMACCESSMODULE_MIXER2_VOL_15_15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES0_ADDR 25842 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES0_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1_ADDR 25843 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES2_ADDR 25844 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES2_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES3_ADDR 25845 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES3_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES4_ADDR 25846 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES4_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES5_ADDR 25847 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES5_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES6_ADDR 25848 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES6_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES7_ADDR 25849 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES7_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES8_ADDR 25850 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES8_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES9_ADDR 25851 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES9_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES10_ADDR 25852 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES10_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES11_ADDR 25853 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES11_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES12_ADDR 25854 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES12_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES13_ADDR 25855 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES13_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES14_ADDR 25856 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES14_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES15_ADDR 25857 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES15_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES16_ADDR 25858 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES16_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES17_ADDR 25859 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES17_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES18_ADDR 25860 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES18_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES19_ADDR 25861 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES19_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES20_ADDR 25862 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES20_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES21_ADDR 25863 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES21_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES22_ADDR 25864 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES22_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES23_ADDR 25865 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES23_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES24_ADDR 25866 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES24_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES25_ADDR 25867 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES25_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES26_ADDR 25868 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES26_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES27_ADDR 25869 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES27_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES28_ADDR 25870 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES28_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES29_ADDR 25871 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES29_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES30_ADDR 25872 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES30_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES31_ADDR 25873 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES31_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES32_ADDR 25874 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES32_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES33_ADDR 25875 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES33_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES34_ADDR 25876 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES34_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES35_ADDR 25877 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES35_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES36_ADDR 25878 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES36_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES37_ADDR 25879 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES37_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES38_ADDR 25880 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES38_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES39_ADDR 25881 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES39_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES40_ADDR 25882 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES40_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES41_ADDR 25883 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES41_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES42_ADDR 25884 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES42_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES43_ADDR 25885 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES43_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES44_ADDR 25886 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES44_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES45_ADDR 25887 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES45_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES46_ADDR 25888 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES46_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES47_ADDR 25889 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES47_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES48_ADDR 25890 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES48_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES49_ADDR 25891 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES49_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES50_ADDR 25892 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES50_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES51_ADDR 25893 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES51_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES52_ADDR 25894 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES52_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES53_ADDR 25895 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES53_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES54_ADDR 25896 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES54_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES55_ADDR 25897 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES55_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES56_ADDR 25898 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES56_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES57_ADDR 25899 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES57_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES58_ADDR 25900 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES58_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES59_ADDR 25901 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES59_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES60_ADDR 25902 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES60_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES61_ADDR 25903 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES61_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES62_ADDR 25904 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES62_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES63_ADDR 25905 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES63_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES64_ADDR 25906 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES64_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES65_ADDR 25907 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES65_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES66_ADDR 25908 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES66_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES67_ADDR 25909 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES67_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES68_ADDR 25910 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES68_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES69_ADDR 25911 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES69_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES70_ADDR 25912 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES70_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES71_ADDR 25913 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES71_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES72_ADDR 25914 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES72_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES73_ADDR 25915 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES73_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES74_ADDR 25916 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES74_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES75_ADDR 25917 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES75_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES76_ADDR 25918 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES76_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES77_ADDR 25919 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES77_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES78_ADDR 25920 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES78_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES79_ADDR 25921 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES79_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES80_ADDR 25922 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES80_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES81_ADDR 25923 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES81_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES82_ADDR 25924 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES82_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES83_ADDR 25925 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES83_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES84_ADDR 25926 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES84_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES85_ADDR 25927 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES85_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES86_ADDR 25928 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES86_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES87_ADDR 25929 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES87_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES88_ADDR 25930 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES88_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES89_ADDR 25931 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES89_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES90_ADDR 25932 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES90_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES91_ADDR 25933 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES91_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES92_ADDR 25934 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES92_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES93_ADDR 25935 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES93_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES94_ADDR 25936 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES94_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES95_ADDR 25937 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES95_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES96_ADDR 25938 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES96_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES97_ADDR 25939 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES97_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES98_ADDR 25940 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES98_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES99_ADDR 25941 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES99_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES100_ADDR 25942 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES100_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES101_ADDR 25943 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES101_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES102_ADDR 25944 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES102_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES103_ADDR 25945 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES103_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES104_ADDR 25946 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES104_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES105_ADDR 25947 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES105_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES106_ADDR 25948 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES106_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES107_ADDR 25949 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES107_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES108_ADDR 25950 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES108_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES109_ADDR 25951 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES109_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES110_ADDR 25952 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES110_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES111_ADDR 25953 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES111_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES112_ADDR 25954 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES112_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES113_ADDR 25955 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES113_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES114_ADDR 25956 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES114_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES115_ADDR 25957 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES115_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES116_ADDR 25958 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES116_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES117_ADDR 25959 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES117_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES118_ADDR 25960 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES118_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES119_ADDR 25961 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES119_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES120_ADDR 25962 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES120_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES121_ADDR 25963 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES121_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES122_ADDR 25964 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES122_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES123_ADDR 25965 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES123_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES124_ADDR 25966 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES124_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES125_ADDR 25967 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES125_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES126_ADDR 25968 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES126_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES127_ADDR 25969 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES127_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES128_ADDR 25970 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES128_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES129_ADDR 25971 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES129_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES130_ADDR 25972 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES130_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES131_ADDR 25973 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES131_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES132_ADDR 25974 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES132_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES133_ADDR 25975 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES133_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES134_ADDR 25976 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES134_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES135_ADDR 25977 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES135_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES136_ADDR 25978 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES136_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES137_ADDR 25979 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES137_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES138_ADDR 25980 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES138_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES139_ADDR 25981 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES139_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES140_ADDR 25982 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES140_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES141_ADDR 25983 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES141_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES142_ADDR 25984 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES142_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES143_ADDR 25985 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES143_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES144_ADDR 25986 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES144_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES145_ADDR 25987 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES145_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES146_ADDR 25988 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES146_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES147_ADDR 25989 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES147_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES148_ADDR 25990 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES148_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES149_ADDR 25991 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES149_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES150_ADDR 25992 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES150_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES151_ADDR 25993 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES151_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES152_ADDR 25994 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES152_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES153_ADDR 25995 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES153_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES154_ADDR 25996 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES154_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES155_ADDR 25997 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES155_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES156_ADDR 25998 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES156_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES157_ADDR 25999 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES157_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES158_ADDR 26000 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES158_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES159_ADDR 26001 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES159_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES160_ADDR 26002 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES160_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES161_ADDR 26003 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES161_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES162_ADDR 26004 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES162_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES163_ADDR 26005 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES163_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES164_ADDR 26006 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES164_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES165_ADDR 26007 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES165_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES166_ADDR 26008 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES166_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES167_ADDR 26009 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES167_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES168_ADDR 26010 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES168_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES169_ADDR 26011 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES169_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES170_ADDR 26012 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES170_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES171_ADDR 26013 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES171_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES172_ADDR 26014 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES172_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES173_ADDR 26015 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES173_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES174_ADDR 26016 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES174_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES175_ADDR 26017 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES175_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES176_ADDR 26018 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES176_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES177_ADDR 26019 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES177_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES178_ADDR 26020 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES178_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES179_ADDR 26021 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES179_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES180_ADDR 26022 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES180_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES181_ADDR 26023 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES181_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES182_ADDR 26024 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES182_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES183_ADDR 26025 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES183_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES184_ADDR 26026 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES184_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES185_ADDR 26027 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES185_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES186_ADDR 26028 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES186_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES187_ADDR 26029 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES187_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES188_ADDR 26030 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES188_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES189_ADDR 26031 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES189_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES190_ADDR 26032 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES190_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES191_ADDR 26033 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES191_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES192_ADDR 26034 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES192_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES193_ADDR 26035 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES193_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES194_ADDR 26036 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES194_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES195_ADDR 26037 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES195_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES196_ADDR 26038 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES196_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES197_ADDR 26039 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES197_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES198_ADDR 26040 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES198_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES199_ADDR 26041 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES199_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES200_ADDR 26042 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES200_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES201_ADDR 26043 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES201_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES202_ADDR 26044 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES202_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES203_ADDR 26045 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES203_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES204_ADDR 26046 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES204_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES205_ADDR 26047 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES205_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES206_ADDR 26048 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES206_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES207_ADDR 26049 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES207_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES208_ADDR 26050 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES208_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES209_ADDR 26051 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES209_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES210_ADDR 26052 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES210_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES211_ADDR 26053 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES211_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES212_ADDR 26054 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES212_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES213_ADDR 26055 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES213_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES214_ADDR 26056 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES214_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES215_ADDR 26057 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES215_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES216_ADDR 26058 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES216_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES217_ADDR 26059 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES217_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES218_ADDR 26060 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES218_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES219_ADDR 26061 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES219_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES220_ADDR 26062 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES220_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES221_ADDR 26063 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES221_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES222_ADDR 26064 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES222_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES223_ADDR 26065 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES223_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES224_ADDR 26066 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES224_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES225_ADDR 26067 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES225_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES226_ADDR 26068 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES226_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES227_ADDR 26069 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES227_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES228_ADDR 26070 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES228_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES229_ADDR 26071 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES229_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES230_ADDR 26072 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES230_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES231_ADDR 26073 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES231_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES232_ADDR 26074 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES232_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES233_ADDR 26075 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES233_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES234_ADDR 26076 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES234_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES235_ADDR 26077 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES235_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES236_ADDR 26078 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES236_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES237_ADDR 26079 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES237_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES238_ADDR 26080 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES238_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES239_ADDR 26081 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES239_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES240_ADDR 26082 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES240_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES241_ADDR 26083 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES241_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES242_ADDR 26084 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES242_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES243_ADDR 26085 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES243_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES244_ADDR 26086 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES244_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES245_ADDR 26087 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES245_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES246_ADDR 26088 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES246_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES247_ADDR 26089 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES247_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES248_ADDR 26090 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES248_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES249_ADDR 26091 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES249_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES250_ADDR 26092 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES250_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES251_ADDR 26093 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES251_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES252_ADDR 26094 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES252_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES253_ADDR 26095 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES253_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES254_ADDR 26096 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES254_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES255_ADDR 26097 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES255_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES256_ADDR 26098 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES256_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES257_ADDR 26099 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES257_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES258_ADDR 26100 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES258_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES259_ADDR 26101 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES259_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES260_ADDR 26102 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES260_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES261_ADDR 26103 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES261_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES262_ADDR 26104 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES262_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES263_ADDR 26105 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES263_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES264_ADDR 26106 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES264_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES265_ADDR 26107 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES265_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES266_ADDR 26108 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES266_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES267_ADDR 26109 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES267_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES268_ADDR 26110 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES268_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES269_ADDR 26111 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES269_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES270_ADDR 26112 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES270_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES271_ADDR 26113 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES271_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES272_ADDR 26114 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES272_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES273_ADDR 26115 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES273_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES274_ADDR 26116 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES274_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES275_ADDR 26117 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES275_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES276_ADDR 26118 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES276_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES277_ADDR 26119 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES277_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES278_ADDR 26120 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES278_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES279_ADDR 26121 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES279_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES280_ADDR 26122 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES280_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES281_ADDR 26123 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES281_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES282_ADDR 26124 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES282_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES283_ADDR 26125 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES283_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES284_ADDR 26126 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES284_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES285_ADDR 26127 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES285_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES286_ADDR 26128 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES286_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES287_ADDR 26129 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES287_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES288_ADDR 26130 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES288_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES289_ADDR 26131 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES289_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES290_ADDR 26132 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES290_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES291_ADDR 26133 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES291_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES292_ADDR 26134 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES292_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES293_ADDR 26135 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES293_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES294_ADDR 26136 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES294_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES295_ADDR 26137 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES295_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES296_ADDR 26138 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES296_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES297_ADDR 26139 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES297_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES298_ADDR 26140 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES298_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES299_ADDR 26141 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES299_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES300_ADDR 26142 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES300_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES301_ADDR 26143 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES301_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES302_ADDR 26144 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES302_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES303_ADDR 26145 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES303_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES304_ADDR 26146 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES304_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES305_ADDR 26147 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES305_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES306_ADDR 26148 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES306_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES307_ADDR 26149 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES307_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES308_ADDR 26150 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES308_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES309_ADDR 26151 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES309_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES310_ADDR 26152 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES310_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES311_ADDR 26153 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES311_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES312_ADDR 26154 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES312_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES313_ADDR 26155 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES313_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES314_ADDR 26156 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES314_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES315_ADDR 26157 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES315_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES316_ADDR 26158 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES316_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES317_ADDR 26159 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES317_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES318_ADDR 26160 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES318_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES319_ADDR 26161 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES319_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES320_ADDR 26162 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES320_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES321_ADDR 26163 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES321_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES322_ADDR 26164 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES322_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES323_ADDR 26165 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES323_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES324_ADDR 26166 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES324_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES325_ADDR 26167 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES325_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES326_ADDR 26168 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES326_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES327_ADDR 26169 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES327_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES328_ADDR 26170 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES328_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES329_ADDR 26171 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES329_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES330_ADDR 26172 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES330_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES331_ADDR 26173 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES331_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES332_ADDR 26174 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES332_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES333_ADDR 26175 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES333_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES334_ADDR 26176 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES334_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES335_ADDR 26177 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES335_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES336_ADDR 26178 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES336_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES337_ADDR 26179 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES337_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES338_ADDR 26180 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES338_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES339_ADDR 26181 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES339_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES340_ADDR 26182 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES340_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES341_ADDR 26183 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES341_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES342_ADDR 26184 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES342_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES343_ADDR 26185 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES343_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES344_ADDR 26186 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES344_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES345_ADDR 26187 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES345_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES346_ADDR 26188 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES346_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES347_ADDR 26189 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES347_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES348_ADDR 26190 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES348_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES349_ADDR 26191 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES349_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES350_ADDR 26192 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES350_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES351_ADDR 26193 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES351_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES352_ADDR 26194 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES352_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES353_ADDR 26195 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES353_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES354_ADDR 26196 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES354_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES355_ADDR 26197 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES355_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES356_ADDR 26198 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES356_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES357_ADDR 26199 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES357_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES358_ADDR 26200 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES358_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES359_ADDR 26201 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES359_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES360_ADDR 26202 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES360_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES361_ADDR 26203 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES361_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES362_ADDR 26204 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES362_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES363_ADDR 26205 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES363_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES364_ADDR 26206 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES364_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES365_ADDR 26207 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES365_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES366_ADDR 26208 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES366_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES367_ADDR 26209 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES367_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES368_ADDR 26210 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES368_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES369_ADDR 26211 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES369_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES370_ADDR 26212 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES370_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES371_ADDR 26213 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES371_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES372_ADDR 26214 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES372_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES373_ADDR 26215 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES373_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES374_ADDR 26216 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES374_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES375_ADDR 26217 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES375_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES376_ADDR 26218 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES376_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES377_ADDR 26219 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES377_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES378_ADDR 26220 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES378_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES379_ADDR 26221 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES379_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES380_ADDR 26222 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES380_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES381_ADDR 26223 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES381_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES382_ADDR 26224 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES382_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES383_ADDR 26225 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES383_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES384_ADDR 26226 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES384_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES385_ADDR 26227 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES385_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES386_ADDR 26228 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES386_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES387_ADDR 26229 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES387_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES388_ADDR 26230 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES388_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES389_ADDR 26231 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES389_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES390_ADDR 26232 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES390_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES391_ADDR 26233 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES391_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES392_ADDR 26234 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES392_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES393_ADDR 26235 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES393_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES394_ADDR 26236 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES394_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES395_ADDR 26237 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES395_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES396_ADDR 26238 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES396_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES397_ADDR 26239 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES397_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES398_ADDR 26240 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES398_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES399_ADDR 26241 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES399_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES400_ADDR 26242 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES400_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES401_ADDR 26243 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES401_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES402_ADDR 26244 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES402_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES403_ADDR 26245 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES403_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES404_ADDR 26246 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES404_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES405_ADDR 26247 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES405_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES406_ADDR 26248 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES406_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES407_ADDR 26249 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES407_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES408_ADDR 26250 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES408_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES409_ADDR 26251 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES409_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES410_ADDR 26252 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES410_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES411_ADDR 26253 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES411_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES412_ADDR 26254 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES412_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES413_ADDR 26255 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES413_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES414_ADDR 26256 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES414_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES415_ADDR 26257 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES415_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES416_ADDR 26258 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES416_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES417_ADDR 26259 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES417_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES418_ADDR 26260 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES418_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES419_ADDR 26261 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES419_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES420_ADDR 26262 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES420_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES421_ADDR 26263 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES421_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES422_ADDR 26264 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES422_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES423_ADDR 26265 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES423_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES424_ADDR 26266 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES424_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES425_ADDR 26267 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES425_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES426_ADDR 26268 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES426_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES427_ADDR 26269 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES427_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES428_ADDR 26270 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES428_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES429_ADDR 26271 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES429_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES430_ADDR 26272 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES430_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES431_ADDR 26273 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES431_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES432_ADDR 26274 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES432_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES433_ADDR 26275 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES433_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES434_ADDR 26276 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES434_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES435_ADDR 26277 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES435_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES436_ADDR 26278 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES436_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES437_ADDR 26279 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES437_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES438_ADDR 26280 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES438_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES439_ADDR 26281 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES439_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES440_ADDR 26282 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES440_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES441_ADDR 26283 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES441_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES442_ADDR 26284 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES442_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES443_ADDR 26285 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES443_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES444_ADDR 26286 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES444_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES445_ADDR 26287 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES445_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES446_ADDR 26288 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES446_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES447_ADDR 26289 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES447_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES448_ADDR 26290 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES448_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES449_ADDR 26291 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES449_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES450_ADDR 26292 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES450_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES451_ADDR 26293 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES451_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES452_ADDR 26294 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES452_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES453_ADDR 26295 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES453_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES454_ADDR 26296 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES454_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES455_ADDR 26297 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES455_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES456_ADDR 26298 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES456_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES457_ADDR 26299 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES457_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES458_ADDR 26300 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES458_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES459_ADDR 26301 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES459_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES460_ADDR 26302 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES460_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES461_ADDR 26303 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES461_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES462_ADDR 26304 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES462_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES463_ADDR 26305 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES463_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES464_ADDR 26306 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES464_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES465_ADDR 26307 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES465_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES466_ADDR 26308 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES466_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES467_ADDR 26309 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES467_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES468_ADDR 26310 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES468_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES469_ADDR 26311 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES469_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES470_ADDR 26312 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES470_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES471_ADDR 26313 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES471_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES472_ADDR 26314 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES472_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES473_ADDR 26315 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES473_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES474_ADDR 26316 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES474_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES475_ADDR 26317 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES475_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES476_ADDR 26318 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES476_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES477_ADDR 26319 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES477_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES478_ADDR 26320 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES478_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES479_ADDR 26321 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES479_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES480_ADDR 26322 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES480_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES481_ADDR 26323 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES481_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES482_ADDR 26324 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES482_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES483_ADDR 26325 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES483_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES484_ADDR 26326 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES484_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES485_ADDR 26327 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES485_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES486_ADDR 26328 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES486_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES487_ADDR 26329 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES487_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES488_ADDR 26330 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES488_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES489_ADDR 26331 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES489_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES490_ADDR 26332 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES490_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES491_ADDR 26333 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES491_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES492_ADDR 26334 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES492_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES493_ADDR 26335 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES493_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES494_ADDR 26336 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES494_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES495_ADDR 26337 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES495_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES496_ADDR 26338 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES496_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES497_ADDR 26339 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES497_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES498_ADDR 26340 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES498_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES499_ADDR 26341 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES499_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES500_ADDR 26342 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES500_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES501_ADDR 26343 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES501_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES502_ADDR 26344 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES502_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES503_ADDR 26345 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES503_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES504_ADDR 26346 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES504_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES505_ADDR 26347 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES505_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES506_ADDR 26348 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES506_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES507_ADDR 26349 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES507_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES508_ADDR 26350 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES508_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES509_ADDR 26351 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES509_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES510_ADDR 26352 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES510_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES511_ADDR 26353 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES511_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES512_ADDR 26354 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES512_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES513_ADDR 26355 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES513_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES514_ADDR 26356 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES514_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES515_ADDR 26357 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES515_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES516_ADDR 26358 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES516_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES517_ADDR 26359 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES517_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES518_ADDR 26360 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES518_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES519_ADDR 26361 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES519_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES520_ADDR 26362 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES520_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES521_ADDR 26363 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES521_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES522_ADDR 26364 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES522_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES523_ADDR 26365 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES523_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES524_ADDR 26366 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES524_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES525_ADDR 26367 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES525_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES526_ADDR 26368 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES526_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES527_ADDR 26369 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES527_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES528_ADDR 26370 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES528_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES529_ADDR 26371 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES529_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES530_ADDR 26372 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES530_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES531_ADDR 26373 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES531_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES532_ADDR 26374 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES532_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES533_ADDR 26375 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES533_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES534_ADDR 26376 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES534_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES535_ADDR 26377 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES535_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES536_ADDR 26378 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES536_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES537_ADDR 26379 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES537_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES538_ADDR 26380 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES538_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES539_ADDR 26381 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES539_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES540_ADDR 26382 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES540_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES541_ADDR 26383 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES541_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES542_ADDR 26384 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES542_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES543_ADDR 26385 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES543_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES544_ADDR 26386 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES544_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES545_ADDR 26387 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES545_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES546_ADDR 26388 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES546_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES547_ADDR 26389 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES547_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES548_ADDR 26390 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES548_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES549_ADDR 26391 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES549_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES550_ADDR 26392 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES550_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES551_ADDR 26393 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES551_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES552_ADDR 26394 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES552_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES553_ADDR 26395 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES553_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES554_ADDR 26396 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES554_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES555_ADDR 26397 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES555_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES556_ADDR 26398 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES556_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES557_ADDR 26399 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES557_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES558_ADDR 26400 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES558_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES559_ADDR 26401 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES559_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES560_ADDR 26402 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES560_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES561_ADDR 26403 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES561_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES562_ADDR 26404 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES562_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES563_ADDR 26405 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES563_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES564_ADDR 26406 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES564_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES565_ADDR 26407 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES565_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES566_ADDR 26408 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES566_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES567_ADDR 26409 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES567_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES568_ADDR 26410 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES568_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES569_ADDR 26411 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES569_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES570_ADDR 26412 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES570_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES571_ADDR 26413 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES571_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES572_ADDR 26414 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES572_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES573_ADDR 26415 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES573_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES574_ADDR 26416 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES574_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES575_ADDR 26417 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES575_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES576_ADDR 26418 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES576_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES577_ADDR 26419 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES577_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES578_ADDR 26420 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES578_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES579_ADDR 26421 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES579_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES580_ADDR 26422 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES580_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES581_ADDR 26423 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES581_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES582_ADDR 26424 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES582_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES583_ADDR 26425 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES583_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES584_ADDR 26426 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES584_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES585_ADDR 26427 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES585_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES586_ADDR 26428 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES586_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES587_ADDR 26429 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES587_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES588_ADDR 26430 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES588_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES589_ADDR 26431 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES589_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES590_ADDR 26432 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES590_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES591_ADDR 26433 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES591_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES592_ADDR 26434 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES592_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES593_ADDR 26435 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES593_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES594_ADDR 26436 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES594_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES595_ADDR 26437 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES595_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES596_ADDR 26438 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES596_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES597_ADDR 26439 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES597_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES598_ADDR 26440 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES598_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES599_ADDR 26441 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES599_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES600_ADDR 26442 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES600_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES601_ADDR 26443 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES601_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES602_ADDR 26444 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES602_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES603_ADDR 26445 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES603_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES604_ADDR 26446 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES604_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES605_ADDR 26447 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES605_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES606_ADDR 26448 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES606_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES607_ADDR 26449 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES607_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES608_ADDR 26450 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES608_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES609_ADDR 26451 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES609_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES610_ADDR 26452 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES610_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES611_ADDR 26453 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES611_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES612_ADDR 26454 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES612_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES613_ADDR 26455 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES613_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES614_ADDR 26456 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES614_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES615_ADDR 26457 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES615_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES616_ADDR 26458 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES616_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES617_ADDR 26459 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES617_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES618_ADDR 26460 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES618_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES619_ADDR 26461 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES619_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES620_ADDR 26462 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES620_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES621_ADDR 26463 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES621_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES622_ADDR 26464 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES622_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES623_ADDR 26465 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES623_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES624_ADDR 26466 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES624_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES625_ADDR 26467 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES625_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES626_ADDR 26468 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES626_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES627_ADDR 26469 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES627_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES628_ADDR 26470 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES628_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES629_ADDR 26471 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES629_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES630_ADDR 26472 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES630_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES631_ADDR 26473 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES631_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES632_ADDR 26474 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES632_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES633_ADDR 26475 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES633_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES634_ADDR 26476 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES634_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES635_ADDR 26477 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES635_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES636_ADDR 26478 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES636_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES637_ADDR 26479 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES637_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES638_ADDR 26480 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES638_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES639_ADDR 26481 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES639_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES640_ADDR 26482 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES640_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES641_ADDR 26483 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES641_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES642_ADDR 26484 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES642_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES643_ADDR 26485 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES643_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES644_ADDR 26486 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES644_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES645_ADDR 26487 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES645_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES646_ADDR 26488 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES646_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES647_ADDR 26489 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES647_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES648_ADDR 26490 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES648_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES649_ADDR 26491 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES649_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES650_ADDR 26492 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES650_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES651_ADDR 26493 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES651_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES652_ADDR 26494 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES652_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES653_ADDR 26495 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES653_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES654_ADDR 26496 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES654_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES655_ADDR 26497 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES655_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES656_ADDR 26498 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES656_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES657_ADDR 26499 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES657_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES658_ADDR 26500 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES658_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES659_ADDR 26501 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES659_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES660_ADDR 26502 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES660_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES661_ADDR 26503 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES661_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES662_ADDR 26504 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES662_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES663_ADDR 26505 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES663_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES664_ADDR 26506 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES664_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES665_ADDR 26507 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES665_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES666_ADDR 26508 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES666_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES667_ADDR 26509 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES667_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES668_ADDR 26510 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES668_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES669_ADDR 26511 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES669_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES670_ADDR 26512 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES670_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES671_ADDR 26513 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES671_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES672_ADDR 26514 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES672_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES673_ADDR 26515 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES673_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES674_ADDR 26516 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES674_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES675_ADDR 26517 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES675_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES676_ADDR 26518 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES676_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES677_ADDR 26519 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES677_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES678_ADDR 26520 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES678_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES679_ADDR 26521 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES679_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES680_ADDR 26522 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES680_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES681_ADDR 26523 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES681_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES682_ADDR 26524 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES682_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES683_ADDR 26525 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES683_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES684_ADDR 26526 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES684_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES685_ADDR 26527 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES685_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES686_ADDR 26528 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES686_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES687_ADDR 26529 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES687_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES688_ADDR 26530 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES688_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES689_ADDR 26531 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES689_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES690_ADDR 26532 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES690_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES691_ADDR 26533 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES691_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES692_ADDR 26534 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES692_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES693_ADDR 26535 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES693_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES694_ADDR 26536 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES694_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES695_ADDR 26537 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES695_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES696_ADDR 26538 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES696_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES697_ADDR 26539 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES697_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES698_ADDR 26540 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES698_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES699_ADDR 26541 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES699_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES700_ADDR 26542 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES700_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES701_ADDR 26543 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES701_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES702_ADDR 26544 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES702_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES703_ADDR 26545 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES703_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES704_ADDR 26546 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES704_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES705_ADDR 26547 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES705_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES706_ADDR 26548 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES706_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES707_ADDR 26549 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES707_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES708_ADDR 26550 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES708_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES709_ADDR 26551 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES709_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES710_ADDR 26552 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES710_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES711_ADDR 26553 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES711_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES712_ADDR 26554 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES712_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES713_ADDR 26555 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES713_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES714_ADDR 26556 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES714_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES715_ADDR 26557 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES715_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES716_ADDR 26558 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES716_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES717_ADDR 26559 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES717_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES718_ADDR 26560 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES718_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES719_ADDR 26561 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES719_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES720_ADDR 26562 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES720_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES721_ADDR 26563 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES721_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES722_ADDR 26564 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES722_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES723_ADDR 26565 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES723_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES724_ADDR 26566 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES724_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES725_ADDR 26567 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES725_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES726_ADDR 26568 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES726_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES727_ADDR 26569 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES727_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES728_ADDR 26570 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES728_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES729_ADDR 26571 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES729_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES730_ADDR 26572 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES730_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES731_ADDR 26573 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES731_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES732_ADDR 26574 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES732_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES733_ADDR 26575 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES733_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES734_ADDR 26576 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES734_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES735_ADDR 26577 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES735_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES736_ADDR 26578 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES736_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES737_ADDR 26579 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES737_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES738_ADDR 26580 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES738_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES739_ADDR 26581 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES739_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES740_ADDR 26582 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES740_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES741_ADDR 26583 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES741_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES742_ADDR 26584 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES742_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES743_ADDR 26585 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES743_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES744_ADDR 26586 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES744_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES745_ADDR 26587 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES745_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES746_ADDR 26588 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES746_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES747_ADDR 26589 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES747_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES748_ADDR 26590 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES748_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES749_ADDR 26591 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES749_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES750_ADDR 26592 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES750_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES751_ADDR 26593 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES751_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES752_ADDR 26594 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES752_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES753_ADDR 26595 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES753_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES754_ADDR 26596 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES754_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES755_ADDR 26597 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES755_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES756_ADDR 26598 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES756_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES757_ADDR 26599 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES757_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES758_ADDR 26600 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES758_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES759_ADDR 26601 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES759_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES760_ADDR 26602 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES760_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES761_ADDR 26603 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES761_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES762_ADDR 26604 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES762_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES763_ADDR 26605 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES763_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES764_ADDR 26606 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES764_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES765_ADDR 26607 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES765_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES766_ADDR 26608 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES766_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES767_ADDR 26609 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES767_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES768_ADDR 26610 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES768_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES769_ADDR 26611 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES769_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES770_ADDR 26612 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES770_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES771_ADDR 26613 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES771_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES772_ADDR 26614 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES772_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES773_ADDR 26615 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES773_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES774_ADDR 26616 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES774_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES775_ADDR 26617 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES775_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES776_ADDR 26618 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES776_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES777_ADDR 26619 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES777_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES778_ADDR 26620 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES778_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES779_ADDR 26621 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES779_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES780_ADDR 26622 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES780_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES781_ADDR 26623 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES781_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES782_ADDR 26624 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES782_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES783_ADDR 26625 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES783_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES784_ADDR 26626 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES784_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES785_ADDR 26627 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES785_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES786_ADDR 26628 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES786_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES787_ADDR 26629 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES787_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES788_ADDR 26630 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES788_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES789_ADDR 26631 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES789_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES790_ADDR 26632 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES790_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES791_ADDR 26633 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES791_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES792_ADDR 26634 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES792_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES793_ADDR 26635 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES793_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES794_ADDR 26636 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES794_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES795_ADDR 26637 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES795_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES796_ADDR 26638 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES796_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES797_ADDR 26639 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES797_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES798_ADDR 26640 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES798_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES799_ADDR 26641 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES799_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES800_ADDR 26642 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES800_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES801_ADDR 26643 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES801_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES802_ADDR 26644 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES802_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES803_ADDR 26645 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES803_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES804_ADDR 26646 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES804_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES805_ADDR 26647 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES805_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES806_ADDR 26648 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES806_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES807_ADDR 26649 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES807_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES808_ADDR 26650 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES808_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES809_ADDR 26651 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES809_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES810_ADDR 26652 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES810_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES811_ADDR 26653 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES811_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES812_ADDR 26654 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES812_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES813_ADDR 26655 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES813_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES814_ADDR 26656 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES814_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES815_ADDR 26657 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES815_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES816_ADDR 26658 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES816_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES817_ADDR 26659 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES817_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES818_ADDR 26660 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES818_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES819_ADDR 26661 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES819_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES820_ADDR 26662 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES820_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES821_ADDR 26663 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES821_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES822_ADDR 26664 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES822_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES823_ADDR 26665 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES823_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES824_ADDR 26666 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES824_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES825_ADDR 26667 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES825_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES826_ADDR 26668 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES826_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES827_ADDR 26669 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES827_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES828_ADDR 26670 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES828_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES829_ADDR 26671 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES829_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES830_ADDR 26672 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES830_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES831_ADDR 26673 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES831_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES832_ADDR 26674 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES832_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES833_ADDR 26675 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES833_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES834_ADDR 26676 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES834_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES835_ADDR 26677 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES835_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES836_ADDR 26678 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES836_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES837_ADDR 26679 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES837_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES838_ADDR 26680 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES838_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES839_ADDR 26681 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES839_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES840_ADDR 26682 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES840_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES841_ADDR 26683 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES841_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES842_ADDR 26684 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES842_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES843_ADDR 26685 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES843_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES844_ADDR 26686 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES844_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES845_ADDR 26687 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES845_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES846_ADDR 26688 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES846_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES847_ADDR 26689 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES847_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES848_ADDR 26690 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES848_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES849_ADDR 26691 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES849_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES850_ADDR 26692 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES850_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES851_ADDR 26693 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES851_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES852_ADDR 26694 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES852_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES853_ADDR 26695 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES853_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES854_ADDR 26696 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES854_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES855_ADDR 26697 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES855_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES856_ADDR 26698 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES856_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES857_ADDR 26699 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES857_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES858_ADDR 26700 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES858_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES859_ADDR 26701 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES859_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES860_ADDR 26702 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES860_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES861_ADDR 26703 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES861_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES862_ADDR 26704 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES862_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES863_ADDR 26705 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES863_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES864_ADDR 26706 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES864_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES865_ADDR 26707 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES865_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES866_ADDR 26708 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES866_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES867_ADDR 26709 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES867_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES868_ADDR 26710 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES868_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES869_ADDR 26711 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES869_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES870_ADDR 26712 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES870_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES871_ADDR 26713 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES871_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES872_ADDR 26714 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES872_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES873_ADDR 26715 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES873_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES874_ADDR 26716 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES874_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES875_ADDR 26717 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES875_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES876_ADDR 26718 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES876_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES877_ADDR 26719 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES877_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES878_ADDR 26720 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES878_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES879_ADDR 26721 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES879_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES880_ADDR 26722 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES880_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES881_ADDR 26723 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES881_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES882_ADDR 26724 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES882_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES883_ADDR 26725 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES883_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES884_ADDR 26726 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES884_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES885_ADDR 26727 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES885_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES886_ADDR 26728 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES886_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES887_ADDR 26729 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES887_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES888_ADDR 26730 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES888_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES889_ADDR 26731 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES889_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES890_ADDR 26732 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES890_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES891_ADDR 26733 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES891_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES892_ADDR 26734 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES892_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES893_ADDR 26735 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES893_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES894_ADDR 26736 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES894_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES895_ADDR 26737 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES895_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES896_ADDR 26738 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES896_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES897_ADDR 26739 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES897_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES898_ADDR 26740 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES898_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES899_ADDR 26741 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES899_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES900_ADDR 26742 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES900_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES901_ADDR 26743 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES901_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES902_ADDR 26744 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES902_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES903_ADDR 26745 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES903_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES904_ADDR 26746 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES904_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES905_ADDR 26747 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES905_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES906_ADDR 26748 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES906_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES907_ADDR 26749 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES907_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES908_ADDR 26750 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES908_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES909_ADDR 26751 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES909_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES910_ADDR 26752 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES910_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES911_ADDR 26753 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES911_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES912_ADDR 26754 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES912_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES913_ADDR 26755 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES913_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES914_ADDR 26756 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES914_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES915_ADDR 26757 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES915_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES916_ADDR 26758 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES916_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES917_ADDR 26759 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES917_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES918_ADDR 26760 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES918_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES919_ADDR 26761 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES919_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES920_ADDR 26762 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES920_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES921_ADDR 26763 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES921_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES922_ADDR 26764 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES922_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES923_ADDR 26765 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES923_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES924_ADDR 26766 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES924_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES925_ADDR 26767 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES925_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES926_ADDR 26768 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES926_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES927_ADDR 26769 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES927_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES928_ADDR 26770 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES928_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES929_ADDR 26771 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES929_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES930_ADDR 26772 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES930_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES931_ADDR 26773 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES931_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES932_ADDR 26774 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES932_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES933_ADDR 26775 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES933_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES934_ADDR 26776 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES934_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES935_ADDR 26777 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES935_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES936_ADDR 26778 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES936_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES937_ADDR 26779 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES937_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES938_ADDR 26780 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES938_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES939_ADDR 26781 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES939_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES940_ADDR 26782 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES940_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES941_ADDR 26783 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES941_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES942_ADDR 26784 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES942_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES943_ADDR 26785 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES943_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES944_ADDR 26786 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES944_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES945_ADDR 26787 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES945_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES946_ADDR 26788 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES946_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES947_ADDR 26789 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES947_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES948_ADDR 26790 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES948_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES949_ADDR 26791 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES949_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES950_ADDR 26792 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES950_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES951_ADDR 26793 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES951_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES952_ADDR 26794 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES952_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES953_ADDR 26795 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES953_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES954_ADDR 26796 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES954_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES955_ADDR 26797 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES955_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES956_ADDR 26798 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES956_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES957_ADDR 26799 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES957_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES958_ADDR 26800 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES958_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES959_ADDR 26801 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES959_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES960_ADDR 26802 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES960_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES961_ADDR 26803 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES961_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES962_ADDR 26804 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES962_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES963_ADDR 26805 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES963_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES964_ADDR 26806 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES964_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES965_ADDR 26807 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES965_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES966_ADDR 26808 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES966_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES967_ADDR 26809 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES967_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES968_ADDR 26810 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES968_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES969_ADDR 26811 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES969_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES970_ADDR 26812 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES970_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES971_ADDR 26813 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES971_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES972_ADDR 26814 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES972_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES973_ADDR 26815 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES973_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES974_ADDR 26816 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES974_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES975_ADDR 26817 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES975_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES976_ADDR 26818 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES976_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES977_ADDR 26819 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES977_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES978_ADDR 26820 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES978_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES979_ADDR 26821 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES979_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES980_ADDR 26822 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES980_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES981_ADDR 26823 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES981_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES982_ADDR 26824 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES982_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES983_ADDR 26825 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES983_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES984_ADDR 26826 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES984_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES985_ADDR 26827 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES985_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES986_ADDR 26828 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES986_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES987_ADDR 26829 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES987_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES988_ADDR 26830 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES988_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES989_ADDR 26831 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES989_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES990_ADDR 26832 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES990_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES991_ADDR 26833 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES991_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES992_ADDR 26834 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES992_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES993_ADDR 26835 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES993_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES994_ADDR 26836 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES994_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES995_ADDR 26837 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES995_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES996_ADDR 26838 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES996_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES997_ADDR 26839 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES997_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES998_ADDR 26840 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES998_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES999_ADDR 26841 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES999_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1000_ADDR 26842 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1000_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1001_ADDR 26843 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1001_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1002_ADDR 26844 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1002_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1003_ADDR 26845 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1003_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1004_ADDR 26846 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1004_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1005_ADDR 26847 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1005_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1006_ADDR 26848 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1006_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1007_ADDR 26849 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1007_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1008_ADDR 26850 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1008_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1009_ADDR 26851 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1009_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1010_ADDR 26852 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1010_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1011_ADDR 26853 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1011_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1012_ADDR 26854 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1012_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1013_ADDR 26855 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1013_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1014_ADDR 26856 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1014_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1015_ADDR 26857 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1015_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1016_ADDR 26858 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1016_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1017_ADDR 26859 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1017_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1018_ADDR 26860 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1018_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1019_ADDR 26861 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1019_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1020_ADDR 26862 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1020_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1021_ADDR 26863 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1021_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1022_ADDR 26864 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1022_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1023_ADDR 26865 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1023_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1024_ADDR 26866 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1024_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1025_ADDR 26867 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1025_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1026_ADDR 26868 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1026_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1027_ADDR 26869 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1027_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1028_ADDR 26870 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1028_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1029_ADDR 26871 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1029_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1030_ADDR 26872 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1030_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1031_ADDR 26873 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1031_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1032_ADDR 26874 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1032_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1033_ADDR 26875 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1033_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1034_ADDR 26876 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1034_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1035_ADDR 26877 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1035_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1036_ADDR 26878 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1036_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1037_ADDR 26879 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1037_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1038_ADDR 26880 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1038_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1039_ADDR 26881 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1039_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1040_ADDR 26882 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1040_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1041_ADDR 26883 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1041_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1042_ADDR 26884 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1042_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1043_ADDR 26885 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1043_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1044_ADDR 26886 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1044_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1045_ADDR 26887 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1045_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1046_ADDR 26888 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1046_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1047_ADDR 26889 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1047_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1048_ADDR 26890 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1048_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1049_ADDR 26891 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1049_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1050_ADDR 26892 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1050_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1051_ADDR 26893 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1051_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1052_ADDR 26894 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1052_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1053_ADDR 26895 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1053_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1054_ADDR 26896 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1054_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1055_ADDR 26897 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1055_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1056_ADDR 26898 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1056_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1057_ADDR 26899 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1057_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1058_ADDR 26900 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1058_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1059_ADDR 26901 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1059_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1060_ADDR 26902 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1060_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1061_ADDR 26903 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1061_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1062_ADDR 26904 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1062_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1063_ADDR 26905 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1063_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1064_ADDR 26906 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1064_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1065_ADDR 26907 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1065_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1066_ADDR 26908 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1066_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1067_ADDR 26909 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1067_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1068_ADDR 26910 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1068_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1069_ADDR 26911 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1069_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1070_ADDR 26912 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1070_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1071_ADDR 26913 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1071_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1072_ADDR 26914 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1072_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1073_ADDR 26915 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1073_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1074_ADDR 26916 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1074_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1075_ADDR 26917 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1075_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1076_ADDR 26918 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1076_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1077_ADDR 26919 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1077_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1078_ADDR 26920 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1078_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1079_ADDR 26921 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1079_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1080_ADDR 26922 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1080_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1081_ADDR 26923 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1081_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1082_ADDR 26924 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1082_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1083_ADDR 26925 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1083_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1084_ADDR 26926 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1084_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1085_ADDR 26927 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1085_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1086_ADDR 26928 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1086_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1087_ADDR 26929 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1087_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1088_ADDR 26930 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1088_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1089_ADDR 26931 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1089_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1090_ADDR 26932 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1090_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1091_ADDR 26933 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1091_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1092_ADDR 26934 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1092_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1093_ADDR 26935 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1093_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1094_ADDR 26936 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1094_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1095_ADDR 26937 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1095_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1096_ADDR 26938 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1096_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1097_ADDR 26939 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1097_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1098_ADDR 26940 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1098_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1099_ADDR 26941 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1099_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1100_ADDR 26942 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1100_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1101_ADDR 26943 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1101_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1102_ADDR 26944 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1102_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1103_ADDR 26945 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1103_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1104_ADDR 26946 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1104_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1105_ADDR 26947 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1105_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1106_ADDR 26948 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1106_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1107_ADDR 26949 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1107_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1108_ADDR 26950 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1108_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1109_ADDR 26951 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1109_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1110_ADDR 26952 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1110_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1111_ADDR 26953 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1111_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1112_ADDR 26954 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1112_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1113_ADDR 26955 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1113_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1114_ADDR 26956 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1114_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1115_ADDR 26957 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1115_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1116_ADDR 26958 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1116_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1117_ADDR 26959 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1117_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1118_ADDR 26960 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1118_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1119_ADDR 26961 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1119_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1120_ADDR 26962 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1120_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1121_ADDR 26963 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1121_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1122_ADDR 26964 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1122_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1123_ADDR 26965 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1123_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1124_ADDR 26966 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1124_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1125_ADDR 26967 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1125_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1126_ADDR 26968 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1126_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1127_ADDR 26969 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1127_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1128_ADDR 26970 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1128_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1129_ADDR 26971 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1129_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1130_ADDR 26972 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1130_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1131_ADDR 26973 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1131_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1132_ADDR 26974 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1132_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1133_ADDR 26975 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1133_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1134_ADDR 26976 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1134_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1135_ADDR 26977 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1135_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1136_ADDR 26978 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1136_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1137_ADDR 26979 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1137_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1138_ADDR 26980 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1138_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1139_ADDR 26981 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1139_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1140_ADDR 26982 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1140_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1141_ADDR 26983 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1141_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1142_ADDR 26984 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1142_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1143_ADDR 26985 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1143_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1144_ADDR 26986 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1144_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1145_ADDR 26987 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1145_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1146_ADDR 26988 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1146_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1147_ADDR 26989 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1147_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1148_ADDR 26990 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1148_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1149_ADDR 26991 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1149_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1150_ADDR 26992 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1150_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1151_ADDR 26993 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1151_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1152_ADDR 26994 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1152_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1153_ADDR 26995 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1153_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1154_ADDR 26996 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1154_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1155_ADDR 26997 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1155_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1156_ADDR 26998 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1156_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1157_ADDR 26999 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1157_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1158_ADDR 27000 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1158_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1159_ADDR 27001 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1159_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1160_ADDR 27002 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1160_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1161_ADDR 27003 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1161_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1162_ADDR 27004 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1162_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1163_ADDR 27005 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1163_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1164_ADDR 27006 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1164_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1165_ADDR 27007 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1165_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1166_ADDR 27008 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1166_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1167_ADDR 27009 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1167_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1168_ADDR 27010 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1168_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1169_ADDR 27011 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1169_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1170_ADDR 27012 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1170_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1171_ADDR 27013 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1171_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1172_ADDR 27014 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1172_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1173_ADDR 27015 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1173_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1174_ADDR 27016 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1174_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1175_ADDR 27017 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1175_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1176_ADDR 27018 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1176_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1177_ADDR 27019 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1177_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1178_ADDR 27020 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1178_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1179_ADDR 27021 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1179_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1180_ADDR 27022 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1180_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1181_ADDR 27023 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1181_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1182_ADDR 27024 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1182_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1183_ADDR 27025 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1183_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1184_ADDR 27026 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1184_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1185_ADDR 27027 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1185_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1186_ADDR 27028 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1186_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1187_ADDR 27029 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1187_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1188_ADDR 27030 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1188_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1189_ADDR 27031 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1189_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1190_ADDR 27032 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1190_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1191_ADDR 27033 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1191_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1192_ADDR 27034 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1192_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1193_ADDR 27035 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1193_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1194_ADDR 27036 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1194_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1195_ADDR 27037 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1195_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1196_ADDR 27038 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1196_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1197_ADDR 27039 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1197_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1198_ADDR 27040 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1198_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1199_ADDR 27041 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1199_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1200_ADDR 27042 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1200_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1201_ADDR 27043 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1201_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1202_ADDR 27044 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1202_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1203_ADDR 27045 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1203_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1204_ADDR 27046 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1204_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1205_ADDR 27047 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1205_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1206_ADDR 27048 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1206_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1207_ADDR 27049 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1207_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1208_ADDR 27050 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1208_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1209_ADDR 27051 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1209_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1210_ADDR 27052 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1210_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1211_ADDR 27053 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1211_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1212_ADDR 27054 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1212_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1213_ADDR 27055 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1213_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1214_ADDR 27056 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1214_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1215_ADDR 27057 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1215_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1216_ADDR 27058 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1216_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1217_ADDR 27059 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1217_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1218_ADDR 27060 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1218_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1219_ADDR 27061 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1219_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1220_ADDR 27062 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1220_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1221_ADDR 27063 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1221_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1222_ADDR 27064 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1222_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1223_ADDR 27065 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1223_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1224_ADDR 27066 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1224_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1225_ADDR 27067 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1225_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1226_ADDR 27068 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1226_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1227_ADDR 27069 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1227_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1228_ADDR 27070 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1228_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1229_ADDR 27071 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1229_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1230_ADDR 27072 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1230_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1231_ADDR 27073 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1231_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1232_ADDR 27074 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1232_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1233_ADDR 27075 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1233_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1234_ADDR 27076 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1234_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1235_ADDR 27077 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1235_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1236_ADDR 27078 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1236_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1237_ADDR 27079 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1237_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1238_ADDR 27080 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1238_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1239_ADDR 27081 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1239_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1240_ADDR 27082 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1240_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1241_ADDR 27083 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1241_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1242_ADDR 27084 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1242_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1243_ADDR 27085 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1243_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1244_ADDR 27086 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1244_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1245_ADDR 27087 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1245_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1246_ADDR 27088 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1246_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1247_ADDR 27089 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1247_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1248_ADDR 27090 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1248_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1249_ADDR 27091 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1249_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1250_ADDR 27092 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1250_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1251_ADDR 27093 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1251_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1252_ADDR 27094 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1252_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1253_ADDR 27095 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1253_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1254_ADDR 27096 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1254_MEMORYPAGE 0 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1255_ADDR 27097 #define MOD_INDIRECTPARAMACCESSMODULE_ADDRESSES1255_MEMORYPAGE 0 #endif