ΣSigmaStudio Ask AI Русский Log in

SPORT routing in SC589

Processors & DSP Alon Nov 1, 2018 00:00 3 replies Original on forum ↗
Subscribe
Alon Question
Nov 1, 2018 00:00

Hello,

I'm using the SC589 with a proprietary design, and the SPORT is used for acquisition using the ADAU7002, and is connected as follows:

DAI0_PIN01 - Data0

DAI0_PIN02 - Data1

DAI0_PIN03 - BCLK

DAI0_PIN04 - LRCKL

How do I configure the SRU accordingly?

I went through the Audio_passthrough_I2S_Core0 example, and also through the examples here, but with no help.

Thanks, T.

Video Products

sc589

Sample Rate Converters

sru

sport

adau7002

Show More

ADIApproved Reply
Nov 9, 2018 00:00

Hi Alon,

Please refer the below Ezone thread, which has many bare metal code example for SPORT and its SRU configuration, hoe this helps.

ADSP-SC58x/2158x SPORT: Example codes

Additionally refer the Digital Audio Interfaces chapter in the ADSP-SC58x hardware reference manual for better understanding.

You could also make use of 'SRU configuration' Add-ins in the CCES (under system.svc in the project explorer ). This add-in provides a simplified method of configuring the SHARC Signal Routing Unit (SRU).

Best Regards,

Jithul

Alon Reply
Nov 10, 2018 00:00

Thank you Jithul for the reply.

As I posted originally, I already went through the examples you suggested, the HRM and the CCES help on the SRU configuration add-on. Still have a problem with the FS signal. As I described, we used the routing as in the HRM, figure 33-10, - the default routing. The only change, if at all is that we use external clk and internal FS. I couldn't find a way to do that, especially when I cannot find any documentation of the signal SPT0A_FS-PBEN_O.

Please help me with this.

Thanks, T.

ADIApproved Reply
Dec 12, 2018 00:00

Hi Alon,

Sorry for the delayed response. See the SRU configuration given below

/* Connect the SPORT0 ACLK to DAI_PIN03 (if SPORT0 CLK is internally generated) */
SRU(SPT0_ACLK_O, DAI0_PB03_I);
SRU(SPT0_ACLK_PBEN_O, DAI0_PBEN03_I);

/* Connect the DAI_PIN03 to SPORT0 ACLK (if SPORT0 CLK is supplied form externally) */
SRU(DAI0_PB03_O, SPT0_ACLK_I);
SRU(LOW, DAI0_PBEN03_I);
SRU(LOW, DAI0_PB03_I);

/* Connect the SPORT0 AFS to DAI_PIN04 ( SPORT0 FS is internally generated) */
SRU(SPT0_AFS_O, DAI0_PB04_I);
SRU(SPT0_AFS_PBEN_O, DAI0_PBEN04_I);

/* Connect the SPORT0 AD0 to DAI_PIN01 */
SRU(SPT0_AD0_O, DAI0_PB01_I);
SRU(SPT0_AD0_PBEN_O, DAI0_PBEN01_I);

/* Connect the DAI_PIN02 to SPORT0 AD1 */
SRU(DAI0_PB02_O, SPT0_AD1_I);
SRU(LOW, DAI0_PBEN02_I);
SRU(LOW, DAI0_PB02_I);

I have also attached a driver based SPORT loop-back example for your reference.

Regards,

Jithul

Sport_Loopback.zip