ADAU1467 Self Boot Time

Hello TomY,

There is no hardware status pin or register to tell you that the bootup is complete. However, you can create on in the DSP program. Since the GPIO pins will float up when no programmed, I suggest that you have the program drive a GPIO pin low and your controller can monitor that pin. It is only a few instructions to do this. Perhaps your system has other GPIO requirements that could also serve this purpose?

I suppose another way is to have a DC cell stuff a value into a Readback cell and you could read that memory location. Keep polling until it holds the correct value. But you would have to be polling. I like the hardware pin better.

Then the other thing you might want to check is the two software Panic Value registers. They are located at 0xF433 and 0xF434. They will be zeros if the selfboot was successful. If the selfboot fails then they will contain the value 0xF433 = CAFE and 0xF434 = BABE. You cannot use this to see when it is completed booting but you can see if it was successful.

You always could calculate the boot time as you suggest or measure it.

Dave T

Hi, Dave

Thank you for your answer.

I think that the way of GPIO pin which you propose need to start the DSP core.
It means GPIO pin will work after Step 5 of the following sequence?
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3. If the SELFBOOT pin is pulled high, a self boot sequence initiates on the master control port. Wait until the self boot operation is complete.
4. If SPI slave control mode is desired, toggle the SS/ADDR0 pin three times. Ensure that each toggle lasts at least the duration of one cycle of the master clock being input to the XTALIN/ MCLK pin. When the SS/ADDR0 line rises for the third time, the slave control port is then in SPI mode.
5. Execute the register and memory write sequence that is required to configure the device in the proper operating mode.
-----------------------------------

Actually, I want to know the start timing of Step 4 (SPI Slave access start from MCU) after Self Boot complete.
How can I know this timmng?
Or Self Boot ROM instruction include these SPI Slave access setting and each register configuration (PLL_CTL, START_CORE, etc.) ?

And also, I find the description of 0xF433 and 0xF434 register in ADAU1466 Datasheet, but there is not them in ADAU1467 Datasheet.
From Datasheet description of "Self Boot Failure" (Page 45), I understand I can check the status by 0xF427 and 0xF428(Panic code:ERR_SOFT).
Which should be used for the check of Self Boot Failure? (0xF433 and 0xF434 or 0xF427 and 0xF428)

Best regards, TomY

Hello TomY,

TomY said:
I think that the way of GPIO pin which you propose need to start the DSP core.
It means GPIO pin will work after Step 5 of the following sequence?

No, it has nothing to do with the slave port.

When the DSP selfboots it will load in the program, then it begins to execute the program. No intervention required. When the DSP starts its program it will run the "Beginning Code" or "Framework Code" once and only once. then it will run the program and at that time the GPIO will go low during the first frame. The source of the Start Pulse may be a factor if it is from an external source. If no start pulse then the program will not run. Usually it is not an external source that is used but it is possible.

I do not know the length of the beginning code but it is listed in the Compiler Output screen and I think it is usually in the 40 to 60 instructions so it is less than a frame. If the part is running at 294MHz then 40 or 60 instructions is not very long at all.

So this is why the GPIO is a good choice for marking when the selfboot is complete.

TomY said:
4. If SPI slave control mode is desired, toggle the SS/ADDR0 pin three times. Ensure that each toggle lasts at least the duration of one cycle of the master clock being input to the XTALIN/ MCLK pin. When the SS/ADDR0 line rises for the third time, the slave control port is then in SPI mode.

TomY said:
Actually, I want to know the start timing of Step 4 (SPI Slave access start from MCU) after Self Boot complete.
How can I know this timmng?
Or Self Boot ROM instruction include these SPI Slave access setting and each register configuration (PLL_CTL, START_CORE, etc.) ?

The slave port is fully independent from the core and from the master comms port. Setting it into SPI mode is a hardware function and the core is not involved. All that is required is for the power to be up and stable and then the reset is released and then wait for the 8 initialization instructions and then you can start the toggles on the SPI port. This can be happening while the DSP is loading the program on the master port. Just do not address the memory or the registers until the selfboot is complete. I am pretty certain that you can read registers and there is hardware to prevent memory contention but it is best to wait. You can do the three toggles and then wait.

The selfboot will setup the PLL and start it up and then start up the core after the program is loaded so there is not need to do anything until it is complete. using the GPIO will signal when it is complete.

TomY said:
From Datasheet description of "Self Boot Failure" (Page 45), I understand I can check the status by 0xF427 and 0xF428(Panic code:ERR_SOFT).
Which should be used for the check of Self Boot Failure? (0xF433 and 0xF434 or 0xF427 and 0xF428)

You can do both. The 0xF427 and 0xF428 are the Panic Flag and the full list of possible panic codes. One of them is the software code, if that is on then check the 0xF433 and 0xF434. (These are not listed in the 1467 datasheet but these registers are there).

If you are specifically looking to see if selfboot was successful then you can go directly to the 0xF433 and 34.

The reason I say this is that if I were writing the initialization code of the controller, I would toggle the SPI port three times then wait for the GPIO to go low. I would not have an infinite loop, I would have a timeout of a few seconds or something appropriate. Then I would know that something is wrong, a quick check of register 0xF433 would tell you if the selfboot was successful. No need to check both registers and no need to check the panic flag and panic code registers. Initialization is kind of a special case.

Once the program is running then you will need to clear the panic flag since booting can trip it, and then start your loop to check it during normal operation.

Dave T

Hi, Dave

Thank you for your answer.

Based on your answer, I summarized my understainding as follows.
Is it correct?

- Power ON (followed specific power sequence)
- DSP detect SELFBOOT pin.
- Self Boot Start.
- Initialization Sequence and PM/DM download is done automatically, like Table 19.
- Self Boot Complete.
- DSP Core Start (Program run) automatically.
- MCU check GPIO.
- MCU toggle SS/ADDR0 for Slave SPI setting. *This toggle can start during Self Boot.
- MCU start to access DSP.
- MCU check 0xF433/0xF434. (or 0xF427:Panic Flag/0xF428:Panic Code)
*If the value was 0xF433=0xCAFE and 0xF434=0xBABE, Self boot failed.

-> I believe that these value's meaning (0xCAFE and 0xBABE) are not specified in the datasheet.
Can you show the all value's meaning of Software Panic Value?
And also, can you specify them to the datasheet?

Best regards, TomY

Hello TomY,

You only have to check for the Software Panic Value if the GPIO pin never changes. If it changes then all is normal and the selfboot was successful.

If you do not implement a GPIO flag, then you can wait sufficient time for the selfboot to have occurred and then check the Software Panic Codes. If it is zero then it was successful.

The codes I listed are the only codes that the hardware will place into the Software Panic Value registers. The purpose of these registers is for the software to place error codes into if it encounters an error and is programmed to place a value into these registers. Up until recently there were no software routines that used it. So the only code this register could ever have is the Selfboot Failure codes I gave you.

There is a change in the framework in progress that will start using the Software Panic Flag, and these value registers to monitor the running programs for frame overruns. Once this is completed I will be writing an Applications Note to detail what they are and why they may be set. Since it is software function I am not planning on putting it into the datasheet since it could be changed at any time and changing the datasheet for an automotive part is a difficult process.

Dave T

Hello, Dave

Thank you for your reply.
I understood it is difficult to specify the Software Panic Value in the datasheet.
I look forward the Applications Note.

Lastly, please let me ask again.

>- Self Boot Start.
>- Initialization Sequence and PM/DM download is done automatically, like Table 19.
>- Self Boot Complete.
>- DSP Core Start (Program run) automatically.

Is the above process of my understanding correct?
Does Automatical Initialization Sequence follow by Table 19?

Best regards, TomY

Hello TomY,

The basic answer is yes.

Once power is applied and stable then all the internal level translators are enabled. Then the MCLK is allowed to go to the PLL and other subsystems. After the initialization code then the internal reset is released. At this point if the Selfboot pin is high and the Reset pin is high it will start the selfboot procedure.

The master port is configured and reads in the first 16 bytes of data. This contains the PLL settings and the basic MCLK routing. This is done at a slow speed. Then it waits for the PLL to lock and then it loads in the registers, the data memories and then the program. The registers are where all the power settings are done.

Then once the EEPROM reading is complete and the program loaded, the checksum is verified. If it is all OK then it sets the start address and starts the core and the program begins operating.

If any part fails, if the first byte of the EEPROM is not an 0xAA or if the checksum is not correct then it will try two more times and after that if it still fails then it will issue the panic code and go to sleep.

All of this is automatic and is in firmware and cannot be changed. The only thing that can be changed is that the checksum can be disabled.

So this is the basic procedure outlined in table 19. What is NOT done are the toggles to get the slave port into slave mode. The selfboot is not done through the slave port so that is still in the default I2C mode. So if you need to communicate with the DSP using SPI, you will need to toggle the slave port three times before you are able to get data out. As I have mentioned in a recent post, these toggles can happen while the part is booting from the EEPROM. Just do not try to access any memory until the booting is complete to avoid any issues with the booting. You can read without memory contention but there are not too many reasons for doing this if you have a GPIO to signal when the boot is complete.

Dave T