Pin detail information on ADAU1452

Hello All,

I have two questions.

For the hardware development stage, I would like you to respond me by February 6.

Question 1:

Is there any change or update information related to other past QA?

< ez.analog.com/.../pin-detailed-information-on-adau1452 >

[ADAU145xDefaultPinStates.xlsx]

Question 2:

When / RESET = "L", when there is a signal input to a certain input signal pin, is the output signal pin related to that pin react and the state changes? ("H" &rarr; "L" or inverted)

For example, SDATA_OUT 0 is output when clock input is made to BCLK_OUT 0 and LRCLK_OUT 0 during / RESET = "L", etc.

Audio Signal Processors

adau1452

SigmaDSP Audio Processors