External I2C EEPROM address for selfboot.

Hello Electrovoicer,

It is the old 7-bit verses 8-bit address in I2C. So take the 0x50 7-bit address and shift it left one bit and add the R/W bit and you will have 0xA0 for a write and 0xA1 for a read.

Dave T

How can I change the basic address which is asked by Master of Bus? It is defined by design of the chip, if DS has no errors. I cannot influence on this choice. In this case, if I use external EEPROM with classic 0xA0 address, the master (adau1452) will not see it on the bus, am I right?

Hello Electrovoicer.

They are both right.

Often in documentation in the industry, I2C addresses are given as a 7-bit number. In this case we give it as 0x50.

When this address is setup to be transmitted, the address is shifted to the left by one bit and the Read/Write bit is added as the LSB. So this multiplies the address by two so it would be 0xA0.

5 x 2 = 0xA.

Then add the state of the read write but will give you the first byte of the I2C transmission as either an 0xA0 or an 0xA1 depending on if it is a read or write command. So the simplification is to not include the Read/Write bit and just give the address as a 7-bit number.

The EEPROM will be seen and will work as long as you tie all the address pins low on the EEPROM.

Dave T

ok, thank you, it is now clear. But I suggest to improve some issues in datasheet