Problems downloading program to ADAU1452
Hi,
I am developing a DSP board with ADAU1452. The DSP is connected to an ESP32 though i2c. The connection seems to be fine. I am able to change filter parameters from the ESP32 though i2c (i2c slave port on DSP).
So far I always uploaded the DSP program first with SigmaStudio via an USBi. Now I want to upload the program from the ESP32 via i2c after power . Therefore I exported the hardware files from SigmaStudio and copied the header files to my MCU project.
I copied the following code from the exported files:
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOFT_RESET_IC_1_ADDR, REG_SOFT_RESET_IC_1_BYTE, R0_SOFT_RESET_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOFT_RESET_IC_1_ADDR, REG_SOFT_RESET_IC_1_BYTE, R1_SOFT_RESET_IC_1_Default );
SIGMA_WRITE_DELAY( DEVICE_ADDR_IC_1, R2_RESET_DELAY_IC_1_SIZE, R2_RESET_DELAY_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_HIBERNATE_IC_1_ADDR, REG_HIBERNATE_IC_1_BYTE, R3_HIBERNATE_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_HIBERNATE_IC_1_ADDR, REG_HIBERNATE_IC_1_BYTE, R4_HIBERNATE_IC_1_Default );
SIGMA_WRITE_DELAY( DEVICE_ADDR_IC_1, R5_HIBERNATE_DELAY_IC_1_SIZE, R5_HIBERNATE_DELAY_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_KILL_CORE_IC_1_ADDR, REG_KILL_CORE_IC_1_BYTE, R6_KILL_CORE_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_KILL_CORE_IC_1_ADDR, REG_KILL_CORE_IC_1_BYTE, R7_KILL_CORE_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_PLL_ENABLE_IC_1_ADDR, REG_PLL_ENABLE_IC_1_BYTE, R8_PLL_ENABLE_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_PLL_CTRL0_IC_1_ADDR, REG_PLL_CTRL0_IC_1_BYTE, R9_PLL_CTRL0_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_PLL_CTRL1_IC_1_ADDR, REG_PLL_CTRL1_IC_1_BYTE, R10_PLL_CTRL1_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_PLL_CLK_SRC_IC_1_ADDR, REG_PLL_CLK_SRC_IC_1_BYTE, R11_PLL_CLK_SRC_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_MCLK_OUT_IC_1_ADDR, REG_MCLK_OUT_IC_1_BYTE, R12_MCLK_OUT_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_PLL_ENABLE_IC_1_ADDR, REG_PLL_ENABLE_IC_1_BYTE, R13_PLL_ENABLE_IC_1_Default );
SIGMA_WRITE_DELAY( DEVICE_ADDR_IC_1, R14_PLL_LOCK_DELAY_IC_1_SIZE, R14_PLL_LOCK_DELAY_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_POWER_ENABLE0_IC_1_ADDR, REG_POWER_ENABLE0_IC_1_BYTE, R15_POWER_ENABLE0_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_POWER_ENABLE1_IC_1_ADDR, REG_POWER_ENABLE1_IC_1_BYTE, R16_POWER_ENABLE1_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_PANIC_PARITY_MASK_IC_1_ADDR, REG_PANIC_PARITY_MASK_IC_1_BYTE, R17_PANIC_PARITY_MASK_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_MP0_MODE_IC_1_ADDR, REG_MP0_MODE_IC_1_BYTE, R18_MP0_MODE_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SCLK_SCL_M_PIN_IC_1_ADDR, REG_SCLK_SCL_M_PIN_IC_1_BYTE, R19_SCLK_SCL_M_PIN_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_MISO_SDA_M_PIN_IC_1_ADDR, REG_MISO_SDA_M_PIN_IC_1_BYTE, R20_MISO_SDA_M_PIN_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SS_M_PIN_IC_1_ADDR, REG_SS_M_PIN_IC_1_BYTE, R21_SS_M_PIN_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_MOSI_M_PIN_IC_1_ADDR, REG_MOSI_M_PIN_IC_1_BYTE, R22_MOSI_M_PIN_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE0_IC_1_ADDR, REG_SOUT_SOURCE0_IC_1_BYTE, R23_SOUT_SOURCE0_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE1_IC_1_ADDR, REG_SOUT_SOURCE1_IC_1_BYTE, R24_SOUT_SOURCE1_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE2_IC_1_ADDR, REG_SOUT_SOURCE2_IC_1_BYTE, R25_SOUT_SOURCE2_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE3_IC_1_ADDR, REG_SOUT_SOURCE3_IC_1_BYTE, R26_SOUT_SOURCE3_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE4_IC_1_ADDR, REG_SOUT_SOURCE4_IC_1_BYTE, R27_SOUT_SOURCE4_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE5_IC_1_ADDR, REG_SOUT_SOURCE5_IC_1_BYTE, R28_SOUT_SOURCE5_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE6_IC_1_ADDR, REG_SOUT_SOURCE6_IC_1_BYTE, R29_SOUT_SOURCE6_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE7_IC_1_ADDR, REG_SOUT_SOURCE7_IC_1_BYTE, R30_SOUT_SOURCE7_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE8_IC_1_ADDR, REG_SOUT_SOURCE8_IC_1_BYTE, R31_SOUT_SOURCE8_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE9_IC_1_ADDR, REG_SOUT_SOURCE9_IC_1_BYTE, R32_SOUT_SOURCE9_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE10_IC_1_ADDR, REG_SOUT_SOURCE10_IC_1_BYTE, R33_SOUT_SOURCE10_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE11_IC_1_ADDR, REG_SOUT_SOURCE11_IC_1_BYTE, R34_SOUT_SOURCE11_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE12_IC_1_ADDR, REG_SOUT_SOURCE12_IC_1_BYTE, R35_SOUT_SOURCE12_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE13_IC_1_ADDR, REG_SOUT_SOURCE13_IC_1_BYTE, R36_SOUT_SOURCE13_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE14_IC_1_ADDR, REG_SOUT_SOURCE14_IC_1_BYTE, R37_SOUT_SOURCE14_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SOUT_SOURCE15_IC_1_ADDR, REG_SOUT_SOURCE15_IC_1_BYTE, R38_SOUT_SOURCE15_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SERIAL_BYTE_0_0_IC_1_ADDR, REG_SERIAL_BYTE_0_0_IC_1_BYTE, R39_SERIAL_BYTE_0_0_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SERIAL_BYTE_1_0_IC_1_ADDR, REG_SERIAL_BYTE_1_0_IC_1_BYTE, R40_SERIAL_BYTE_1_0_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SERIAL_BYTE_4_0_IC_1_ADDR, REG_SERIAL_BYTE_4_0_IC_1_BYTE, R41_SERIAL_BYTE_4_0_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SERIAL_BYTE_5_0_IC_1_ADDR, REG_SERIAL_BYTE_5_0_IC_1_BYTE, R42_SERIAL_BYTE_5_0_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, PROGRAM_ADDR_IC_1, PROGRAM_SIZE_IC_1, Program_Data_IC_1 );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, PARAM_ADDR_IC_1, PARAM_SIZE_IC_1, Param_Data_IC_1 );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, DM1_DATA_ADDR_IC_1, DM1_DATA_SIZE_IC_1, DM1_DATA_Data_IC_1 );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_KILL_CORE_IC_1_ADDR, REG_KILL_CORE_IC_1_BYTE, R46_KILL_CORE_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_START_ADDRESS_IC_1_ADDR, REG_START_ADDRESS_IC_1_BYTE, R47_START_ADDRESS_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_START_PULSE_IC_1_ADDR, REG_START_PULSE_IC_1_BYTE, R48_START_PULSE_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_START_CORE_IC_1_ADDR, REG_START_CORE_IC_1_BYTE, R49_START_CORE_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_START_CORE_IC_1_ADDR, REG_START_CORE_IC_1_BYTE, R50_START_CORE_IC_1_Default );
SIGMA_WRITE_DELAY( DEVICE_ADDR_IC_1, R51_START_DELAY_IC_1_SIZE, R51_START_DELAY_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_HIBERNATE_IC_1_ADDR, REG_HIBERNATE_IC_1_BYTE, R52_HIBERNATE_IC_1_Default );
And made sure, that the macros are filled with a i2c code behind.
My ESP32 now produces the following output on the i2c line:
F890 0, 0,
F890 0, 1,
F400 0, 0,
F400 0, 1,
F403 0, 0,
F403 0, 1,
F003 0, 0,
F000 0, 60,
F001 0, 3,
F002 0, 1,
F005 0, 7,
F003 0, 1,
F050 4, FF,
...
F404 0, 0,
F401 0, 2,
F402 0, 0,
F402 0, 1,
F400 0, 0,
It sends out the left byte first.
That seems all correct. But nothing changes on the DSP. It remains silent. No clocks, no audio, nothing. I programmed some delay after power-on of 5s. That did not help. But if then download the program via SigmaStudio/USBi everything is fine. The DSP starts and clocks and audio are there.
If I let the ESP now download the program again, the audio and clocks disappear during i2c transfer. After that they come back, but the DSP still runs the old program from SigmaStudio and not the new one from the ESP.
I tried already both modes self boot and non-selfboot. No change. I tried to reset the DSP before ESP downloads the program, no success.
So I guess SigmaStudio is performing something that is not written in the code export of SigmaStudio.
Any idea how to fix this?
Raphael
Audio Signal Processors
adau1452
SigmaDSP Audio Processors
To make this a bit more interesting:
This is the code now in my ESP32:
Serial.print( "Uploading firmware" );
SIGMA_WRITE_REGISTER( 0xF890, 0x00,0x00 );
SIGMA_WRITE_REGISTER( 0xF890, 0x00,0x01 );
delay(500);
SIGMA_WRITE_REGISTER( 0xF400, 0x00,0x00 );
SIGMA_WRITE_REGISTER( 0xF400, 0x00,0x01 );
delay(500);
SIGMA_WRITE_REGISTER( 0xF403, 0x00,0x00 );
SIGMA_WRITE_REGISTER( 0xF403, 0x00,0x01 );
SIGMA_WRITE_REGISTER( 0xF003, 0x00,0x00 );
SIGMA_WRITE_REGISTER( 0xF000, 0x00,0x60 );
SIGMA_WRITE_REGISTER( 0xF001, 0x00,0x03 );
SIGMA_WRITE_REGISTER( 0xF002, 0x00,0x01 );
SIGMA_WRITE_REGISTER( 0xF005, 0x00,0x07 );
SIGMA_WRITE_REGISTER( 0xF003, 0x00,0x01 );
delay(500);
SIGMA_WRITE_REGISTER( 0xF050, 0x04,0xFF );
SIGMA_WRITE_REGISTER( 0xF051, 0x00,0x00 );
SIGMA_WRITE_REGISTER( 0xF422, 0x00,0x03 );
SIGMA_WRITE_REGISTER( 0xF510, 0x00,0x0D );
SIGMA_WRITE_REGISTER( 0xF79D, 0x00,0x0F );
SIGMA_WRITE_REGISTER( 0xF79E, 0x00,0x0F );
SIGMA_WRITE_REGISTER( 0xF79F, 0x00,0x0F );
SIGMA_WRITE_REGISTER( 0xF7A0, 0x00,0x0F );
SIGMA_WRITE_REGISTER( 0xF180, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF181, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF182, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF183, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF184, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF185, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF186, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF187, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF188, 0x00,0x2A );
SIGMA_WRITE_REGISTER( 0xF189, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF18A, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF18B, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF18C, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF18D, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF18E, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF18F, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF200, 0x93,0xCA );
SIGMA_WRITE_REGISTER( 0xF204, 0x26,0x0A );
SIGMA_WRITE_REGISTER( 0xF210, 0x93,0xCA );
SIGMA_WRITE_REGISTER( 0xF214, 0x26,0x0A );
SIGMA_WRITE_BLOCK( 0xC000, dspPM, 636 );
SIGMA_WRITE_BLOCK( 0x0000, dspDM0, 164 );
SIGMA_WRITE_BLOCK( 0x6024, dspDM1, 16 );
SIGMA_WRITE_REGISTER( 0xF403, 0x00,0x00 );
SIGMA_WRITE_REGISTER( 0xF404, 0x00,0x00 );
SIGMA_WRITE_REGISTER( 0xF401, 0x00,0x02 );
SIGMA_WRITE_REGISTER( 0xF402, 0x00,0x00 );
SIGMA_WRITE_REGISTER( 0xF402, 0x00,0x01 );
delay(500);
SIGMA_WRITE_REGISTER( 0xF400, 0x00,0x00 );
Serial.println( "OK" );
This is an exact copy of the SigmaStudio capture window.
It produces the following data sequence on the i2c bus:
Uploading firmwareF890 0, 0
F890 0, 1
F400 0, 0
F400 0, 1
F403 0, 0
F403 0, 1
F003 0, 0
F000 0, 60
F001 0, 3
F002 0, 1
F005 0, 7
F003 0, 1
F050 4, FF
F051 0, 0
F422 0, 3
F510 0, D
F79D 0, F
F79E 0, F
F79F 0, F
F7A0 0, F
F180 0, 2
F181 0, 2
F182 0, 2
F183 0, 2
F184 0, 2
F185 0, 2
F186 0, 2
F187 0, 2
F188 0, 2A
F189 0, 2
F18A 0, 2
F18B 0, 2
F18C 0, 2
F18D 0, 2
F18E 0, 2
F18F 0, 2
F200 93, CA
F204 26, A
F210 93, CA
F214 26, A
C000 0, 0, 0, 2, C, 0, DC, DC, D, 0, FF, D2, D, 0, FF, D0, D, 0, F4, 50, D, 0, F4, 0, C0, 0, 23, 80, 80, 0, 0, 0, C0, 0, 23, 0, 80, 0, 0, 0, C0, 0, 23, C0, 80, 0, 0, 10, C0, 0, 22, 0, 80, 0, 0, 0, 8, 80, DC, E0, C, 0, DC, DC, C0, 0, 28, 30, 80, 0, 0, 24, C0, 0, 30, 0, 80, 0, 0, 0, 1, 0, 0, 16, 6, 40, 50, 10, C0, 0, 20, 0, 80, 0, 0, 29, D, 0, FF, C1, C0, 0, 20, 0, 80, 0, 0, 1, D, 0, F4, 62, C0, 0, 20, 0, 80, 0, 0, 0, D, 0, F4, 62, C0, 0, 20, 0, 80, 0, 0, 2, D, 0, FF, D1, 0, 0, 0, 3, D, 0, FF, D2, 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0, 2, 1, 0, 24, 0, 0, 0, 0, 0, 0, 0, 0, 8, 9E, DC, E0, 8, 9C, 0, 10, 0, 0, 0, 0, C0, 0, 0, 0, 82, 4F, 0, 14, 8, 8A, DC, E0, A, 21, 0, 1A, 0, 8C, 20, 0, A, A5, 0, 19, 2, 9, 0, 40, C0, 0, 28, 70, 80, 0, 60, 0, 0, 8C, 11, 91, 0, 0, 0, 23, 0, 0, 0, 0, 30, 0, BC, E9, 0, 0, C2, F1, 1, 0, 0, 3F, 6, 0, 40, 14, 36, 40, 50, 15, 26, 40, 40, 15, 9, 2A, 0, 1A, 0, 0, 0, 0, C, 0, FC, 40, 6, 40, 10, 1E, C, 0, FC, 41, 6, 40, 10, 2E, C, 0, FC, 42, 6, 40, 10, 3E, C, 0, FC, 43, 6, 40, 10, 4E, C, 0, FC, 44, 6, 40, 10, 5E, C, 0, FC, 45, 6, 40, 10, 6E, C, 0, FC, 46, 6, 40, 10, 7E, C, 0, FC, 47, 6, 40, 10, 8E, C, 0, FC, 60, 6, 40, 10, 9E, C, 0, FC, 61, 6, 40, 10, AE, C, 0, FC, 62, 6, 40, 10, BE, C, 0, FC, 63, 6, 40, 10, CE, C, 0, FC, 64, 6, 40, 10, DE, C, 0, FC, 65, 6, 40, 10, EE, C, 0, FC, 66, 6, 40, 10, FE, C, 0, FC, 67, 6, 40, 11, E, C, 0, FC, 68, 6, 40, 11, 1E, C, 0, FC, 69, 6, 40, 11, 2E, C, 0, FC, 6A, 6, 40, 11, 3E, C, 0, FC, 6B, 6, 40, 11, 4E, C, 0, FC, 6C, 6, 40, 11, 5E, C, 0, FC, 6D, 6, 40, 11, 6E, C, 0, FC, 6E, 6, 40, 11, 7E, C, 0, FC, 6F, 6, 40, 11, 8E, C, 0, FC, 50, 6, 40, 11, 9E, C, 0, FC, 51, 6, 40, 11, AE, C, 0, FC, 52, 6, 40, 11, BE, C, 0, FC, 53, 6, 40, 11, CE, C, 0, FC, 54, 6, 40, 11, DE, C, 0, FC, 55, 6, 40, 11, EE, C, 0, FC, 56, 6, 40, 11, FE, C, 0, FC, 57, 6, 40, 12, E, 8, 90, 0, 22, C, 70, 0, 1B, E, 3D, 0, 1E, 0, F4, AE, F, A, 25, DC, DC, A, E1, 0, 1C, 0, 0, DC, 70, 0, 0, A4, D8, 0, D6, 21, 1, 0, 0, E0, 29, 7, 5, 88, 8, 0, 84, 19, B3, 0, 4, 45, 90, 0, 44, 2C, 30, 0, 4, 49, 28, 0, 94, 8, 87, B, E1, 0, 1C, 5, 4D, 10, E, 6, 0, 10, E, D, 0, FC, C0, 8, 9C, 0, 10, 0, 0, 0, 0, 0, 0, 2E, 1, 0, 0, 0, 0, 9, 9C, 0, 10, 0, 0, 0, 2, C, 10, F4, 60, 2, C2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, FF, FF, FF, FF, FF, 0, 5, 58, 17, 0, 0, 0, 0, 0, 0, C0, 0, 0, 0, C0, 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
6024 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
F403 0, 0
F404 0, 0
F401 0, 2
F402 0, 0
F402 0, 1
F400 0, 0
OK
Interestingly, this only works, if the ADAU1452 was touched by USBi before. From a fresh boot after power up it does not work.
So, clearly the USBi is doing something before downloading that is not stated in the data sheet and not given in the capture window.
I need help on this immediately because we want to go into mass production in May!
Raphael
Hello Raphael,
My questions:
Are you looking at the actual I2C bus with something like a beagle or with a scope? It helps to be certain that the controller code is actually sending out what you are expecting to send out.
The other thing is that there are some delays that need to be there. If not then the PLL will not be locked. If the PLL is not locked then you cannot write to the rest of the registers. So if you start writing before the lock the data you are writing will be lost. I am only guessing here but it would describe what you are experiencing.
The early commands are a soft reset, and I see it in your code, so it should not make a difference between powered up and already programmed. The difference is that the PLL is already started and that may be the difference.
Look at Table 27 in the datasheet. Page 32. This is what you should be doing. SigmaStudio does do a few extra things but this is usually because it has no idea of the state of the DSP before programming so it will send some extra writes but in this part it is pretty much what you see in the datasheet. Some of the other parts we have with converters SigmaStudio will send things like mutes then it will reprogram. But in this part there are no converters.
Are any of your serial ports set to be masters? Then watch those pins. The serial ports will output clocks as long as it is set to be a master, and it is not a multi-function pin set to the GPIO function. For the clock to appear the PLL has to be set properly and the part needs to lock to the incoming master clock. This is all has nothing to do with the core or with the program loaded in the core itself. It is only register settings and proper power and clocks. Since SimgaStudio is working I can say that your power and master clock should be fine. Then it comes down to setting up the PLL properly and writing to the registers.
See what you find.
Dave T
Hi Dave,
I solved the issue myself: It was caused by the write burst mode to program PM memory and DM0 and DM1. It seems, that the DSP can not handle this. Thus, I changed it as follows: Send the register address, send 4 bytes ( = 1 dword), increment the register address, send the register address, send next four bytes, increment register address... and so on.
So maybe I am sending the next data word to fast after the previous one was completed or something like this. Anyway, the method with sending the incremented register address works for now, nevertheless I would like to find out why I can not use the write burst mode as described in the data sheet.
Raphael
Hello Raphael,
The burst mode does function, it will automatically increment. However, the first early writes to the PLL configuration registers has to be done and then waiting for the PLL to lock. But it sounds like you are on to something.
You may be correct that it is too fast but our part does meet and exceed the standard I2C specifications. So how fast is your I2C clock? What are your pull-up values for the I2C bus and how much capacitance is on the bus? So looking at your rise time would be a good thing to look at on a scope.
Once your crunch time is over with we can look into this further. I am also in a bit of a crunch with a new product release myself.
Dave T
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