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bf-609 SPI master delay between words

Processors & DSP Edvard Jul 29, 2019 00:00 1 replies Original on forum ↗
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Edvard Question
Jul 29, 2019 00:00

I have been looking through datasheets and documentations and couldn't find anything specific regarding this meter.

As far as I understand and correct me if I am wrong delays between words both on tx and rx of SPI master are referred to as a sequential transfer delays (t SPITDM )?

The issue that I am facing is that these delays are quite big in my case (see attached image)

They are about 0.1125us long. Every 40ms we transmit 300 packets consisting of 64B headers and 1024B bodies, so every packet has 270 of these delays, and it adds up to 9.11ms and the whole transaction instead of being ~20ms ends up being above 30ms.

Is there a way to reduce these dlays? as my simple mind cannot find any evident solutions to this, thanks

pastedimage1564378491549v1.png
pastedimage1564378491549v1.png
Edvard Reply
Jul 29, 2019 00:00

Setting
adi_spi_SetSlaveSelectDelay(hDevice[nhDevice],false,false,0);
solved the issue, problem solved.