eval-adau1467 with external master clock - how?

I am trying to evaluate an external synth as master clock (si5340) for our dsp product based on adau1467. So, my idea was to connect the output from the synth to the middle pin on J3 on the adau-1467 eval board. I have removed resistors R9 and R35 (is it really necessary to remove R9?). I have connected the output from the synth which is set to 12.288MHz (same as Y1). But I do not get any sound out of the board.

In SigmaStudio I can see that PLL=PLL unlocked, which is bad. Synth amplitude was too low.

I have checked that the clock signal is present on pin 25 XTALIN/MCLK. I expect that the same dsp code should be used in both cases, i.e. PLL CLK SRC = Pll clock.

Do you have any ideas what might be wrong?

Thanks

Alex

PS. I have also tested to run with a signal generator, varying the frequency and amplitude, but with the same negative result

Edit Notes
Turned out that the amplitude had been too low. When it reached 3Vp-p, then the PLL locked.

[edited by: Alexander at 12:33 PM (GMT 0) on 26 Sep 2019]

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