ADAU1787 combined output

Hello,

There re several options and would depend on the sample rates for the two DSP's.I do not know what applies to your case but here are the options.

Option1

If the sample rates for both the DSP's are same then you can bring the SDSP into FDSP by adding the SDSP Inputs from IO cells in FDSP toolbox and use mixer call to add the two signals in FDSP schematic.

Option2

If the SDSP sample rate is 48K and FDSP sample rate is 192K/384K then you need to use the interpolator block to bring the sample rate of the signal from SDSP upto FDSP.

Now you could use mixer block to add the two signals. one example shown here, where the Interpolator signal from SDSP and ADC are summed in FDSP.

Then lastly you can select the desired FDSP outputs to be routed to DAC in the DAC control Register Tab.

Hope this helps. Let us know if any more questions.

Thanks for the information Rajeev, it will need to be the latter approach as we need to run FDSP at 384K to minimise latency. By the way, how do you set the FDSP sample rate please? Sigmastudio has only one selection box for Fs which from looking at the compiler output seems to mostly affect the SDSP, but here we have a device with 2 independent cores.... I can see a way of upping the SDSP clock speed on page 48 of the DS, but nothing about the FDSP.

Hi Rajeev I need to bump this thread as the hardware is finally finished and I need code that actually works. There is one thing you didn't cover in your earlier reply and that is how to define the inputs to the interpolator: I've trawled the Toolbox section of the Sigmastudio documentation, but there's nothing that covers this type of algorithm, just the downsampler for the ADAU145x devices which has an input, which this block doesn't. I've tried setting sensible options in FINT_CTRL, but to no avail - how are the inputs meant to be defined please?

Hi Dunmail,

I see, the routing matrix on ADAU1787 is pretty large and can be confusing.

The FINTx_ROUTEx bits in the FINT_CTRL tab would be used to route the signal source of Interpolator. The Interpolator outputs always go to FDSP. So setup the input signal source for interpolator in FINT_CTRL tab using the highlighted bits and then use that Interpolator output in the FDSP by pulling the Slow to Fast Interpolator Inputs from the toolbox on the left. See the screen captures shown below.

Note the Interpolator input sample rate and output sample rate also need to be set in FINT_CTRL tab.

Hope this helps.

Regards

Rajeev

Thanks, that sorts the register control issue (I'd assumed routing to SDSP0 for L and SDSP1 for R), but where do I route the outputs of the SDSP blocks to please? surely they're not just left floating in the breeze?

And what exactly are the SAIO ports/nodes please? I've done a search but can't find any reference to them.