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Distortion using sample rate fs 44.1k

SigmaDSP & SigmaStudio alexjaw Dec 28, 2019 00:00 2 replies Original on forum ↗
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alexjaw Question
Dec 28, 2019 00:00

I must have missed something very basic about dsp configuration. Here is my problem:

I have set up my eval1467 board as an i2s slave (both bclk and lrclk) on in0. SigmaStudio schematic sample rate is set to 192k and start pulse set to in0. The distortion is ok as long as the i2s frame clock from the i2s master is based on 48k, ~0.01%. But with 44.1k it's terrible 4%. However, it improves somewhat for fs 2x44.21k and even more with 4x44.1k (but never better than 1%). This puzzles me since I though that the dsp does not care about the sample rate as long as its < 192k (and not too low).

Image. Typical distortion measurement, 3.8% for 1KHz sine tone and fs 44.1kHz.

I have tested to set SigmaStudio schematic sample rate to 44.1k, but that does not make any difference.

Have tested to run the i2s input through the ASRC without any difference.

Have tested to have as short wiring as possible (twisted) without any difference.

Have tested two different codecs where I can intercept the i2s before the DAC. Therefore I also know that the 44.1k audio is perfectly fine (low distortion) when measured after the DAC.

Can this problem be connected to the master clock frequency (from the xtal) of 12.288MHz on the eval board? I know that other codecs need different master clocks depending on 44.1 or 48 based material.

Thank's

Alexander.

Edit Notes
Added possible explanation related to xtal master clock f=12.2288MHz

[edited by: alexjaw at 9:02 AM (GMT 0) on 29 Dec 2019]

Audio Signal Processors

distortion

sample rate

adau1467

i2s

SigmaDSP Audio Processors

44.1khz

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distortion.jpg
distortion.jpg
alexjaw Reply
Dec 30, 2019 00:00

Problem was my configuration. Looking back at the tests it's very strange that ASRC has the same bad distortion as directly from IN0. That suggests that the dsp was not in sync with the material. When start pulse was changed from IN0 to BASE_FS, then the distortion became as good as when running the material at multiples of 48k. Makes sense since we want to sync against the ASRC output (and not it's input).

Actually I also tested to run the dsp with an external master clock of 11.2896MHz (and adjusted the PLL CTRL0) and then the situation was the opposite. Good distortion for 44.1k material and bad for 48k when running directly from IN0 (i.e. without ASRC).

Hope this might help other dsp novices.

Happy new year,

A.

DaveThib Reply
Jan 6, 2020 00:00

Hello Alex,

You did not give any details of how the codec is connected for the DACs? I assume you kept the output ports as master because the codec on the eval board is setup to be a slave for the DACs if I remember properly.

Ok, so if you are bringing in another source that is NOT using the same master clock then you will have some issues with clicks and pops.

If you are using the same clock and have the core running at one rate, like 48kHz, and give it a 44.1kHz signal, the serial port will be running at a slower rate. This means the core will be picking up some samples twice and this causes distortion. The level sits at the same level for two samples which adds a lot of harmonics if you look at an FFT of the output signal.

If you go the other way, core running at 44.1kHz and the serial port running at 48kHz, means that the serial port will update the output memory location faster than the core picks up the data from that location. So some samples will be missed. So a sine wave will all of a sudden jump up over the missed data point adding distortion.

When you deal with multiples of the sampling rate then you either miss every other sample or you insert a hold of the data for every other sample if the ratio is 2:1 for the sample rates. So you have to have them be in sync and set to the same rate.

The ASRCs are there to convert between the two rates and they work great. However, you have to set them up correctly. I am not sure you set them up properly. Attach a project. It is easy to miss some details when first starting out with setting these things up. There are some things that are not intuitive. Based on your description of the results I do not think you were actually using the ASRC. The job of the ASRC is to convert the incoming rate to the core rate.

If you explain a bit more of what you are doing I might have some example projects for you.

Happy New Year!!

Dave T