ADAU1452 FIR filter POOL component
Hello again all of you :-)
Maybe one of you can help me with this. I'm working on a project which involves one audio input and three outputs.Obviously, the audio signal is filtered diffently on all three channels. For an upgrade, we decided to use the ADAU1452 and adding FIR to the audio paths. But, some customers want their FIR right after the input, and some want a FIR before each output.
This would involve a lot of taps and I have room for only 6800 in total.
To clarify, I made a drawing for the two options:
Option 1: FIR on the input
Option 2: Three FIR filters before the output:
As you can see, for the two options, I need 4 different FIR components.
I hoped to solve that with one FIR Filter POOL component and my question is: can that be done ? (with the aid of some mux-ers and de-mux-ers)...
Also, can a Fir Filter Pool use a different number of taps per output?:
I still want 2400 taps on output 1, 2400 on output 2 and 2000 on output three.
And all these combined in one FIR for the input:
I know, it looks a bit odd :-) but it's quite straight forward and I hoped to build a configuration which can be loaded into the DSP once and then organized according to customer settings...
The main question is: can a FIR Filter POOL use a different number of taps on different in/outputs?
Hope to hear from you soon.
With kind regards,
Reini
Audio Signal Processors
adau1452
SigmaDSP Audio Processors
fir
Hello Reini,
Good questions and interesting design challenge. However, I do not think this will work as you would like it to work.
The filter pool filters must all be the same size. So that is a problem.
Then if you setup a routing matrix you might run into a compiler error since there will probably be ways to select signals such that there is a feedback loop and it does not allow that. Now, if the switch is an index controlled switch it might not be able to detect this possible condition. I did not experiment with it since you will not be able to allocate different sized filters and then reallocate the memory during execution to make it one large filter.
By the way, there is a delay built into this cell and you can move it to be before or after the EQ. The help files does not go into too much more detail on it.
Dave T
To elaborate a little on Dave's comments, the function of the FIR filter pool block is to save data memory when multiple channels are being filtered with the same coefficient set (or the same in reverse order). They do not save processing instructions, and they do not have any advantage over separate FIR blocks if the coefficients are different.
Ken
Thank you Dave,
It is indeed not what I hoped for, but the feedback loop is something I didn't think about. I will have to look at other options. Maybe different DSP applications which can be loaded according to the users whishes. But then I will have to deal with different I2C addresses of the used components...
So it is still a challenge :-) But thanks again for your reply!
With kind regards,
Reini
Thanks Ken!
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