Need hints on use of two control ports on advanced sigmadsp processors
Hello,
On the advanced SigmaDSP processors, there are two control ports. One is a master (used for self boot) and the other is a slave.
Can anyone throw more light on why two control ports are needed/ provided and how two control ports can be used effectively in applications?
Thanks in advance for your inputs!
KKSL.
The slave control port is used for booting and controlling the DSP from a PC (using the USBi programmer) or from a microcontroller. The master control port is pretty basic and is used primarily for self-boot from a flash or EEPROM. it may also be used for simple setup of peripherals such as a CODEC or as delay memory using an SPI SRAM.
Ken
Thank you for your early reply.
So can the master control port simultaneously connect to self-boot EEPROM and a CODEC, say AD1937?
It will READ from the self-boot EEPROM. Will it also WRITE to the CODEC (which needs to be a slave) during the self boot process?
If yes, will it READ CODEC configuration data stored into the EEPROM and WRITE it to the CODEC without manual intervention? That would simplify the process so much.
KKSL
Hello KKSL,
Yes, there is a block in SigmaStudio in the Master Control Port section which can initialize another chip (like AD1937) after the selfboot operation is completed.
Once an XML file describing the initialization is loaded into SigmaStudio and the project is compiled, the data will be written to the EEPROM the next time it is flashed.
Joshua
Hello,
My requirement about selfboot is as given below:
1. Be able to Selfboot using 1024k serial EEPROM
2. Be able to configure a CODEC as a part of the selfboot process and without any help from a microcontroller
3. Be able to READ the selfboot EEPROM after the selfboot process is complete. ( DSP- GPIO will signal the uC about the end of selfboot process after which the uC will READ from the selfboot EEPROM)
4. uC be able to communicate (READ and WRITE) with the DSP
5. Be able to control the signal flow from the PC, using USBi, and in real time and also be able to modify/ download the signal flow to the boot eeprom
I believe that based on my last 3 requirements, I need to use I2C protocol for self boot and will need to use multiple instances of Master Control Port IO block from the Master Control Port>Startup boot.
Is my understanding correct that the first instance with Slave # 0 will be the first 512k locations of the selfboot eeprom, the second instance with Slave # 1 will be the same selfboot eeprom for the next 512 locations and the third instance with slave # 2 be a CODEC?
Then I will also need to generate an XML sequence file (for which I will need some help)
Kindly review and suggest me the correct process for my requirement.
Thanks!!
With reference to my above requirements, I think I need to do the following:
Have a single I2C line that would have the following connected:
1. SigmaDSP Primary Master Port
2. I2C EEPROM as Slave
3. CODEC as SLAVE
4. SigmaDSP Slave Port
5. USBi as Master
6. uC as Master
The SigmaDSP GPIO will signal the uC that the selfboot is complete, only after whicxh it will try to get access of the I2C line to control either the EEPROM or SogmaDSP.
I had doubt about the EEPROM needing to have an address of 0x50 but another post here cleared that one.
If this os ok, I can freeze the schematic and any doubts about the actual implementation using the Master Control Port block in SigmaStudio can be looked into once the board arrives.
Kindly review and ok or otherwise.
Thanks!!
Hello KKSL,
We normally do not recommend that all these ports are connected together. There are three masters on the bus and a lot of capacitance. You did mention about the GPIO so I know you are aware that the DSP and the USBi cannot operate in a multi-master environment. So you must stop all communications from the uC when the USBi is enabled.
It is also a good idea to setup some hardware logic to lower the selfboot pin when the USBi is plugged in. Because, when you are programming the DSP SigmaStudio will do a soft reset and that will trigger a selfboot so then you will have the master port writing to the EEPROM.
I have seen some people use an I2C bus repeater to disconnect the connection from the I2C slave port bus and the I2C Master port bus. So you can only get to the EEPROM when it is enabled.
So my main point with all this is that this is risky and I am not sure if anyone has successfully done this.
Dave T
Thank you!
How can I send you a PM so that I can share the bigger picture?
Thanks!
Mouse over my user name and the menu should pop up and private message is one of the options.
Dave T
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