ADAU1401 MCLK and BCLK

Should also clarify, using the MCLKI pin is not an option as this is connected to a 12.288MHz oscillator

ADAU1401 serial audio input => LRCLK and BCLK are "slave" only. (datasheet p.46).

I see some options:

- Generate MCLK with a dedicated chip and push that into both the ASRC and the ADAU1401, and use the ASRC to generate BCLK and LRCLK.

- Generate all the clocks needed between ASRC and ADAU on a dedicated clock generator chip (including MCLK).

- Use an ASRC with PLL able to generate its own MCLK from BCLK, and get BCLK and LRCLK from the ADAU1401 output. ADAU is making MCLK with an Xtal in this case.

Why not using a DSP a bit beefier with SPDIF inputs and ASRC already integrated? Budget? You are already adding 3 more DACS to the ADAU, might as well get a nice CODEC, an ADAU145x and get rid of the SPDIF/ASRC thing altogether...

Thanks. I already considered that. I ordered a beefier one. however the board isn't going to be here for quite a while. Thanks for the answer as well, that was what I was thinking of doing, but just wanted to verify it.

specifically an adau1446

Ok, so this is my plan: I will use a asrc between the spdif receiver and the DSP, and then use a pll to generate the MCLK from BCLK. Does this seem reasonable?

What ASRC are you using exactly? I need to take a peek in the datasheet.

I was looking at using the cs8421:

https://www.cirrus.com/products/cs8421/

I was also wondering, could I just use a clock generator to generate the mclk if the frequency is fixed?

I am currently looking at using the cs8421 from cirrus logic. Was also wondering if I could just use a clock generator rather than a pll to generate a fixed MCLK if the sampling frequency is fixed?

No need PLL or external clock, CS8421 can work as a slave or master on both serial input and output. So you can generate the clock with an xtal on the CS, and feed MCLK out of the CS to the ADAU.

Hello Scorch,

We have used the CS8416 and it has a clock output which is 128x fs or 256 x fs once the PLL locks to the incoming signal. It also will also switch to a system clock if the PLL is not locked.

This is what should drive the master clock input of the DSP.

I did not look at the CS8412 but it looks like CopperMaze did. The key is you have to have a master clock that is derived from the incoming clock on the SPDIF signal. Then you will not need a sample rate converter because the DSP will just follow the sample rate of the incoming SPDIF signal.

The only problem is if you are planning on using higher sample rates above 48kHz. Then it starts getting tricky.

I also recommend you move to the ADAU145x family of parts with SPDIF and ASRCs built in. They are so much more powerful and you can do a lot more with them without the need of a controller.

Dave T