Combining two evaluation boards

Dear AD,

I am not expecting to much for a 'perfect' or a 'kind' response from AD. Just say something here, "I do not know", "I do not have that example" ... anything to let me know someone there is caring the customer's question.

Hello August,

We certainly care about these questions. We have been very busy and I have been taking these questions in order as best I can. So sorry for the delay.

We do not have an example file for the FxLMS application. IF you can describe your requirements for the ADAU!787 and the ADAU1466 then I can put together some example projects to get you started.

I Will need the details of how many and what kind of inputs and outputs. Sample rates, serial communications standards, etc. Then in the 1466 what processing are you planning on doing?

One other little comment. There is no such thing as zero latency converters. The converters in the ADAU1787 can be setup to be very low latency but not quite zero.

Dave T

Dear Dave,

Thank you for your kind response. I did hope for an opportunity to discuss the project in details, but the problem has been considered to be obsolete.

Nevertheless, it was basically a question about how to set: data transfer (A) from serial output line of ADAU1787 (sdatao0/J40) to serial input line of ADAU1466 (sdata_in0) and data transfer (B) from serial output line of ADAU1466 (sdata_out0) to serial input line of ADAU1787 (sdatai0/J40). The plan was to put the ADAU1787 at the instrumentation side and the ADAU1466 at the signal processing side.

I can (1) set the two boards to work at sample rate 48kHz, (2) connect the coresponding headers in data transfer (A) and data transfer (B) by cables, including the FCLK and BCLK pins, and (3) select the approriate H/W setting in the ROUTING MATRIX and SERIAL_PORTS (in ADAU1466) and the ASRC_CTRL and SPT_CTRL (ADAU1787).

But for the later, step (3), I felt lost about how to chose the right H/W setting, for example, how to set master and slave relation in data transfers (a) and (B). Therefore, I wish to have your kind direction. One project example, or even better, a tutorial material can surely help me.

By the way, I really appreciate your 'little comment' which is very honest. Thank you, take care.

Best wishes, A.Oey

PS: The motivation for the question is come from an old similar project with ADAU1777 and ADAU1452. At that time, the audio codec chip ADAU1938 was literally removed from the ADAU1542 board. As the result, the latency was greatly improved to be less than 10uS. Please note that in ADAU1452 the latencies of ADC and DAC at fs=48kHz are about 480uS and 520us, respectively). I wish 'the old destructive approach" can be avoided with the ADAU1466 and ADAU1787.