ADAU1466 : external MCLK = internal PLL ???
Hello,
I use ADAU1466 with external MCLK at 24.576MHz.
Fs = 192 kHz
On this "program" :
On IN one DAC (I2S 32 bits) - On OUT 4 ADC (I2S 32 bits).
If I use "PLL clock" as "PLL CLK SRC" (with after /4 and x96), no problem, my program run (sinus on ADC in, sinus on DAC out).
If I use "MCLK pin" as "PLL CLK SRC" (with after /8 and x96), my program run but the datas on DAC out no good.
For me, in 2 cases, ADAU core run at same frequency.
PLL = 12.288 / 4 * 96 = +/- 295MHz
MCLK = 24.576 / 8 * 96 = +/- 295MHz
I don't see my error.
Thank you for your help.
Best regards,
Alexandre
Audio Signal Processors
SigmaDSP Audio Processors
adau1466
Hello,
It seems that it’s just the wording that’s not clear (it’s the least we can say...).
Alexandre.
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