Using Two FIR Operations to the same signal. There is a way to save DM0 memory allocation?
Hello,
Here goes the big picture:
I have Left and Right Input Signals.
Two IR Table.
Left and Right Out.
Right Out = Gain*(Right Signal with Table 1) + Gain*(Right Signal with Table 2)
Left Out = Gain*(Left Signal with Table 1) + Gain*(Left Signal with Table 2)
This way I waste DM0. There is a way to the FIR algorithm use the same sampled signal from the other?
I'm using ADAU1452, and I want dual FIR with 9600 samples.
Audio Signal Processors
adau1452
SigmaDSP Audio Processors
Take a look at the "FIR Filter Pool" block (Filters > FIR > FIR Filter Pool). The purpose of this block is to reuse FIR filter coefficients to save memory. An input can be filters with any set of stored coefficients. This seems like exactly what you need.
Using FIR Filter Pool I learn how to use the same signal to different Filters. But, the Filter Pool uses the double of memory for filter allocation. Why this happens?
And trying another topology:
I got DM0 full, there is a way to manage memory allocation of FIR Algorithm?
With properly memory management, this algorithm will fit my ADAU1452.
Sorry. I wasn't clear. The filter pool has two modes. It can either optimize for MIPS, taking full advantage of SIMD operations, or it can optimize memory. Right click to choose the other option:
There is no way of placing either the regular FIR block or FIR filter pool in one memory bank or another because any FIR filter optimized for MIPS will use both DM0 and DM1 to take full advantage of the dual MAC architecture.
Ken
Thank you.
Just one more thing that I didn't understand.
Why Pool Filter ocupe two times more memory than regular FIR?
1000 for Sampled Signal.
1000 for Table.
1000 for Sample Signal.
2000 for Table.
Why this happen? (the case above)
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Ken.M said:
There is no way of placing either the regular FIR block or FIR filter pool in one memory bank or another because any FIR filter optimized for MIPS will use both DM0 and DM1 to take full advantage of the dual MAC architecture.
Answers like that is great for my learning process. Thank you.
It's a little hard to explain, but it has to do with the way that memory is addressed by the core to keep the two MACs always fed with data/coefficients. Note that you only have that much overhead if you have a single input and single output, which defeats the purpose of that block. When you add more inputs and/or outputs, you'll start to see the savings,
Thanks!
And I notice that:
The Fir do a auto management between Dm0 and Dm1 as the input increases.
Looks like have 3000 on Dm0 and 2000 on Dm1 of Sampled Signal.
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