How to set ADAU1701 HW/SW to adapt different sample rate signals?
Hello ADI engineers,
In developing ADAU1701 with external I2S PCM input, I meet problems in setting Hardware/ software for 96khz/ 192khz sample rate.
The default setting in EVM is:
MCLK 12.288mhz, PLL_Mode:01(256xfs), 48khz sample rate in Sigma software interface.
It works well when external I2S rate is 48khz.
Question1: how should I set MCLK, PLL_MODE and Software Sample Rate(core control register) when sample rate of I2S signal is 96khz or 192khz?
Question2: if I want to use 24.576mhz Oscilator as MCLK (for 48khz rate input signal), how should I adjust PLL_Mode and Software sample rate? Is it 11(512xFs)for PPL_Mode, 48khz for software?
Question3, should PLL Loop filter be adjusted for different PLL?
Question4: does internal DAC and ADC of ADAU1701 support 96khz and 192khz?
Kind regards,
Louie
Edit Notes
Add Question4: does internal DAC and ADC of ADAU1701 support 96khz and 192khz?
[edited by: Louie.LI at 9:11 AM (GMT -5) on 26 Feb 2021]
Audio Signal Processors
SigmaDSP Audio Processors
adau 1701
adau1701
Further, I use an external Decoder as Digital source and the internal DAC for output.(MCLK:42.576MHZ, PLL:11(512fs)) But whenever I set software rate as 48khz, 96khz, 192khz, the 96khz and 192khz digital source cannot work in internal DAC. Is this because internal DAC does not support 96khz and 192khz sample rate? Waiting for your response.
Louie
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