FIR_Inbase
when using the xxxxx example for running FIR accelerator for SC584, the FIR_Inbase register gets this value : FIRA_TCB1[8]=((int)InputBuff1>>2)|0xA000000;
why is the value of 0xA000000 added? it isnt mentioned in the manual by what I can see.
The FIR accelerator (and all other peripherals) need to add an offset (different for SHARC1 and SHARC2 memory space and S1 and S2 ports) to access SHARC core's L1 memory in the system (called as multiprocessor memory) space. FIR accelerator expects the addresses to be 32 bit word (normal word space) aligned. However, by default, the buffers are place in byte word memory space. Thus, the L1 address is right shifted by 2 and then an offset of 0xA000000 = 0x28000000>>2) is added. See the following table in the data sheet for more details.
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