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modify SDRAM size in app.ldf

Processors & DSP kweiwen Feb 28, 2022 00:00 3 replies Original on forum ↗
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kweiwen Question
Feb 28, 2022 00:00

Hi ADI Admin,

Our team is going to adopting new SDRAM model W9864G6JH-6 instead of defaulting one MT48LC16M16A2 from 21479/21489 project, any hints to modify ldf file? the default one is 4M x 4Banks x 16Bits(256Mbit) and current one is 1M x 4Banks x 16Bits(64Mbit).

The default ldf of SDRAM setting is:

mem_sdram_swco { TYPE(SW RAM SYNCHRONOUS) START(0x00600009) END(0x0077FFFF) WIDTH(16) }
mem_sdram_nwco { TYPE(PM RAM SYNCHRONOUS) START(0x00280000) END(0x002FFFFF) WIDTH(16) }
mem_sdram_dmda { TYPE(DM RAM SYNCHRONOUS) START(0x00480000) END(0x0097FFFF) WIDTH(16) }
mem_sdram_pmda { TYPE(DM RAM SYNCHRONOUS) START(0x00980000) END(0x00AFFFFF) WIDTH(16) }

sdram

sharc

sharc21489

ldf

dsp&processors

Nishanthi Reply
Mar 4, 2022 00:00

Hi,

To modify a memory in LDF, we would recommend referring to both your SDRAM data sheet and the data sheet for our SDRAM and modify according to the memory address of your custom SDARM.

Any section in the LDF delimited by VDSG sections will be preserved if/when the tools regenerate the LDF (which will happen if you change Project Properties or Startup Code/LDF settings).

As you can open the LDF in the Editor window, browse to the MEMORY{...} segment and you can add 4 SDRAM blocks within $VDSG sections. You can then adjust their size by editing the start/end parameters, and add new sections by using the existing ones as a template. Note that if you create a new memory segment, you need to also add custom Output Sections to map to that segment. E.g. if you added a MEM_SDRAM0_BANK4, you may need to add something like:

mem_sdram_bank4_code{
//INPUT_SECTIONS commands
} > MEM_SDRAM0_BANK4

Again, the Output Section commands for SDRAM (within the SECTIONS{...} block of the LDF) are also wrapped in VDSG tags, so you can edit and add to these as required.

All of the LDF commands are documented in the Linker and Utilities Manual, which can be found in the Help at "Help > Contents > SHARC® Development Tools Documentation > Linker and Utilities Manual". We are also attaching an document that covers editing the LDF in CCES - all of this is covered by the Linker and Utilities Manual, however the attached PDF is in an abridged form.

PDF
Regards,
Nishanthi.V

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kweiwen Reply
Mar 4, 2022 00:00

hi Nishanthi,

thanks for the fast reply,i have no problem with the syntax to define the section of SDRAM and its banks. On the other hand would you point me out how to define the START and END address of SDRAM?

BR,

kweiwen

Nishanthi Reply
Mar 10, 2022 00:00

Hi,

The START and END address for your SDRAM is from 0x0020 0000 to 0x03FF FFFF.

If you look at the address space defined in the default LDF, address range START(0x00600009) END(0x0077FFFF) corresponds to short word code which is 16 bit. And, address range START(0x00280000) END(0x002FFFFF) corresponds to normal word code which is 48 bit. And Address ranges START(0x00480000) END(0x0097FFFF) and (0x00980000) END(0x00AFFFFF) correspond to DATA which is 32 bit.

So, you need to take care of start and end addresses correctly according to address bits.

You can separate this address into different banks as in the default LDF.

for more information please refer the below threads, which might helpful to you.

https://ez.analog.com/dsp/sharc-processors/f/q-a/60700/how-to-caculate-48bit-address-in-ldf/284808
https://ez.analog.com/dsp/sharc-processors/f/q-a/62484/calculating-a-starting-address-for-32-bit-addresses-for-sharc

Also, we request you to kindly go through page 296 to 300 of the “Programming Reference Manual” which also gives an example of how to calculate the first 32-bit /48-bit starting address. The link for the manual is given below:
https://www.analog.com/media/en/dsp-documentation/processor-manuals/ADSP-2136x_2137x_214xx_pgr_rev2.4.pdf

Regards,
Nishanthi.V