Sigma Studio REV 4.6 Completion problem in using ADAU1467.

SigmaDSP & SigmaStudio menashe Mar 28, 2022 00:00 1 replies Original on forum ↗

menashe Question

Mar 28, 2022 00:00

I used Sigma Studio REV 4.5 for application contain DSP ADAU1467 and compile my application. I got the signal out put as I expected. I update Sigma Studio to REV 4.6 update the USBi driver and compile the same application. The application didn't reply any errors but I didn't got any signal output.

Can you explain??I can send the out

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sigma studio 28-3-22 lab ver 4_6.txt
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###### IC 2 ######
ADAU145X Assembler, Analog Devices Inc.
Version: 4.6.0,1809 (built 12/23/2020)

##### Compile Started: Monday, March 28, 2022 11:37:52 AM #####
##### Compile succeeded: 0 errors, 0 warnings #####

##### Summary #####
DM0 RAM used: 21762 (of 40960)
DM1 RAM used: 03354 (of 40960)
PM RAM used(Data): 00000 (of 24576)
PM RAM used(Inst): 04864 (of 24576) 3853 instructions (32bit: 2842 64bit: 1011)
Total PM used: 04864 (of 24576)

--------------------------------------------------------------------------------------
STREAM fs=48000 Inst Inst DM0 DM1 PM
Instance (cycles) (size)
--------------------------------------------------------------------------------------
STACK - - 68 0 0
FRAMEWORK 200 206 177 8 0
149 102 99 103 0
AVC1 91 93 36 29 0
Compressor1_3 48 53 61 1 0
Compressor1_2 48 53 61 1 0
Gen Filter1_16 21 37 6 15 0
Gen Filter1_15 21 37 6 15 0
Gen Filter1_7 21 37 6 15 0
Gen Filter1_19 21 37 6 14 0
Gen Filter1_24 21 37 6 14 0
Gen Filter1_4 21 37 6 14 0
Gen Filter1_20 21 37 6 14 0
Gen Filter1_23 21 37 6 14 0
Gen Filter1_21 21 37 6 14 0
Gen Filter1_5 21 37 6 14 0
Gen Filter1_22 21 37 6 14 0
FIR2 64 34 192 194 0
FIR1 64 34 192 194 0
NR_HIGH 16‡ 19 1 1 0
NR_HIGH_2 16‡ 19 1 1 0
NR_LOW_2 16‡ 19 1 1 0
NR_LOW 16‡ 19 1 1 0
Level2_21 13 13 14 1 0
Level2_22 13 13 14 1 0
Level2_19 13 13 14 1 0
Level2_18 13 13 14 1 0
Level2_20 13 13 14 1 0
Level2_23 13 13 14 1 0
Single 3_5 8 11 3 0 0
Input1 8 8 0 4 0
Nx1 Linear1 6 7 2 1 0
Single 1_2 6 6 4 1 0
Single 3_4 6 6 4 1 0
Single 1 6 6 4 1 0
Single 3_7 6 6 4 0 0
Single 3_6 6 6 4 0 0
DownSampling2 6 6 2 2 0
Gain2 5 5 1 1 0
Output3 2 2 0 0 0
(‡ Jump instruction present, actual cycle count may differ.)
--------------------------------------------------------------------------------------
Total 1102 1205 1068 708 0
--------------------------------------------------------------------------------------
(% Fs=48.0kHz) 18% 5% 3% 2% 0%

--------------------------------------------------------------------------------------
STREAM fs=16000 Inst Inst DM0 DM1 PM
Instance (cycles) (size)
--------------------------------------------------------------------------------------
STACK - - 68 0 0
FRAMEWORK 127 141 153 0 0
FIR6_2 64 34 192 194 0
FIR5_2 64 34 192 194 0
FIR4_2 64 34 192 194 0
FIR3_2 64 34 192 194 0
UpSampling2 12 14 2 6 0
Level2_16 13 13 14 1 0
Level2_17 13 13 14 1 0
DownSampling1_2 10 10 2 4 0
Add1_16 8 8 0 2 0
--------------------------------------------------------------------------------------
Total 439 335 1021 790 0
--------------------------------------------------------------------------------------
(% Fs=16.0kHz) 3% 2% 3% 2% 0%

--------------------------------------------------------------------------------------
STREAM fs=8000 Inst Inst DM0 DM1 PM
Instance (cycles) (size)
--------------------------------------------------------------------------------------
STACK - - 68 0 0
FRAMEWORK 140 156 155 0 0
BlockInput1 26†‡ 26 0 16 0
BlockInput7 26†‡ 26 0 16 0
BlockOutput1 22‡ 22 0 18 0
BlockOutput3 22‡ 22 0 18 0
UpSampling1_2 16 18 2 8 0
(† Call instruction present, actual cycle count may differ.)
(‡ Jump instruction present, actual cycle count may differ.)
--------------------------------------------------------------------------------------
Total 252 270 225 76 0
--------------------------------------------------------------------------------------
(% Fs=8.0kHz) 1% 2% 1% 1% 0%

--------------------------------------------------------------------------------------
BLOCK fs=8000 size=64 Inst Inst DM0 DM1 PM
Instance (cycles) (size)
--------------------------------------------------------------------------------------
MALLOC - 216 348 1408 0
FRAMEWORK 116 136 153 0 0
FRNR4 53660‡ 351 4508 8 0
FRNR1 53660‡ 351 4508 8 0
FRNR3 53660‡ 351 4508 8 0
FRNR2 53660‡ 351 4508 8 0
Synthesis Window2_6 141† 31 129 68 0
Synthesis Window2_4 141† 31 129 68 0
Synthesis Window2_5 141† 31 129 68 0
Synthesis Window2_7 141† 31 129 68 0
Analysis Window2_4 140† 27 132 4 0
Analysis Window2_5 140† 27 132 4 0
Analysis Window2_7 140† 27 132 4 0
Analysis Window2_6 140† 27 132 4 0
IFFT2 1436† 12 0 4 0 using: Complex IFFT Sub DM1128
IFFT3 1436† 12 0 4 0 using: Complex IFFT Sub DM1128
FFT3 1368† 12 0 4 0 using: Complex FFT Sub DM1128
FFT4 1368† 12 0 4 0 using: Complex FFT Sub DM1128
FFT2 1368† 12 0 4 0 using: Complex FFT Sub DM1128
IFFT4 1436† 12 0 4 0 using: Complex IFFT Sub DM1128
IFFT1 1436† 12 0 4 0 using: Complex IFFT Sub DM1128
FFT1 1368† 12 0 4 0 using: Complex FFT Sub DM1128
BlockInput3 2 2 0 4 0
BlockInput5 2 2 0 4 0
BlockInput4 2 2 0 4 0
BlockInput2 2 2 0 4 0
BlockOutput4 2 2 0 0 0
BlockOutput2 2 2 0 0 0
BlockOutput5 2 2 0 0 0
BlockOutput6 2 2 0 0 0
(† Call instruction present, actual cycle count may differ.)
(‡ Jump instruction present, actual cycle count may differ.)

Subroutines called:
Complex FFT Sub DM1128 - 418 3 0 0
Complex IFFT Sub DM1128 - 471 0 0 0
--------------------------------------------------------------------------------------
Total 227112 2989 19580 1776 0
--------------------------------------------------------------------------------------
(%) 10% 13% 48% 5% 0%
Instructions Per-Block-Frame (total/blocksize): 3549

Files written:
----------------------------------------------------
compiler_output.log: compiler output report
report.dat: #report/#report_text output
DMem0.dat: DM0 content (hex)
DMem1.dat: DM1 content (hex)
PMem.dat: PM data content (hex)
Program.bin: PM program content (binary)
Program.dat: PM program content (hex)
ParamAddress.dat: Parameter RAM locations for schematic instances

############
Obsolete algorithm code encountered in this project:
http://wiki.analog.com/resources/tools-software/sigmastudio/usingsigmastudio/buildingschematics/obsoletealgorithms

1. Cell: FIR2, Algorithm: FIR
2. Cell: FIR1, Algorithm: FIR
3. Cell: DownSampling2, Algorithm: DownSampling
4. Cell: FIR6_2, Algorithm: FIR
5. Cell: FIR5_2, Algorithm: FIR
6. Cell: UpSampling2, Algorithm: UpSampling
7. Cell: FIR4_2, Algorithm: FIR
8. Cell: FIR3_2, Algorithm: FIR
9. Cell: DownSampling1_2, Algorithm: DownSampling
10. Cell: UpSampling1_2, Algorithm: UpSampling

######

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sigma studio 28-3-22 lab ver 4_5.txt
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Compiler###### IC 2 ######
ADAU145X Assembler, Analog Devices Inc.
Version: 4.5.0,1779 (built 10/28/2019)

##### Compile Started: Monday, March 28, 2022 11:28:04 AM #####
##### Compile succeeded: 0 errors, 0 warnings #####

##### Summary #####
DM0 RAM used: 21762 (of 40960)
DM1 RAM used: 03362 (of 40960)
PM RAM used(Data): 00000 (of 24576)
PM RAM used(Inst): 04960 (of 24576) 3925 instructions (32bit: 2890 64bit: 1035)
Total PM used: 04960 (of 24576)

--------------------------------------------------------------------------------------
BLOCK fs=8000 size=64 Inst Inst DM0 DM1 PM
Instance (cycles) (size)
--------------------------------------------------------------------------------------
MALLOC - 216 348 1408 0
FRAMEWORK 116 136 153 0 0
FDNR1_4 757*‡ 375 4508 10 0
FDNR1 757*‡ 375 4508 10 0
FDNR1_3 757*‡ 375 4508 10 0
FDNR1_2 757*‡ 375 4508 10 0
Synthesis Window2_6 141† 31 129 68 0
Synthesis Window2_4 141† 31 129 68 0
Synthesis Window2_5 141† 31 129 68 0
Synthesis Window2_7 141† 31 129 68 0
Analysis Window2_4 140† 27 132 4 0
Analysis Window2_5 140† 27 132 4 0
Analysis Window2_7 140† 27 132 4 0
Analysis Window2_6 140† 27 132 4 0
IFFT2 1436† 12 0 4 0 using: Complex IFFT Sub DM1128
IFFT3 1436† 12 0 4 0 using: Complex IFFT Sub DM1128
FFT3 1368† 12 0 4 0 using: Complex FFT Sub DM1128
FFT4 1368† 12 0 4 0 using: Complex FFT Sub DM1128
FFT2 1368† 12 0 4 0 using: Complex FFT Sub DM1128
IFFT4 1436† 12 0 4 0 using: Complex IFFT Sub DM1128
IFFT1 1436† 12 0 4 0 using: Complex IFFT Sub DM1128
FFT1 1368† 12 0 4 0 using: Complex FFT Sub DM1128
BlockInput3 2 2 0 4 0
BlockInput5 2 2 0 4 0
BlockInput4 2 2 0 4 0
BlockInput2 2 2 0 4 0
BlockOutput4 2 2 0 0 0
BlockOutput2 2 2 0 0 0
BlockOutput5 2 2 0 0 0
BlockOutput6 2 2 0 0 0
(* Variable loop detected, actual cycles may differ.)
(† Call instruction present, actual cycle count may differ.)
(‡ Jump instruction present, actual cycle count may differ.)

Subroutines called:
Complex FFT Sub DM1128 - 418 3 0 0
Complex IFFT Sub DM1128 - 471 0 0 0
--------------------------------------------------------------------------------------
Total 15500 3085 19580 1784 0
--------------------------------------------------------------------------------------
(%) 1% 13% 48% 5% 0%
Instructions Per-Block-Frame (total/blocksize): 242 (<1%)

############
Obsolete algorithm code encountered in this project:
http://wiki.analog.com/resources/tools-software/sigmastudio/usingsigmastudio/buildingschematics/obsoletealgorithms

######

put files reports of the two complication for comparing.

Audio Signal Processors

adau1467

SigmaDSP Audio Processors

sigma-studio-28-3-22-lab-ver-4_6.txt10.7 KBsigma-studio-28-3-22-lab-ver-4_5.txt10.7 KB

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Harishgowtham Reply

Mar 28, 2022 00:00

Hello menashe,

If possible could you please send your project? We will have a look and get back. However, have you replaced all the modules which come under obsolete algorithm at the bottom of the file (ex. FIR etc..) ? It can be replaced by following the wiki link given in the compiler output or just follow this.

Regards,

Harish

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