Sigma DSP Setting SPDIF_TX_CS Registers
We are manually setting both the LEFT (0xF6A0 to 0xF6AB) and RIGHT (0xF6B0 to 0xF6BB) SPDIF_TX _CS registers directly from the register map. In our case we have SPDIF_TX_ AUXBIT_SOURCE (0xF69F) set to 0 - Source from register map.
If we load the DSP directly from our CPU it seems these registers do not get written unless we put a wait state in. Is there a way around this? Is this the case as it needs to initialize the SPDIF Tx first before you can write to it?
Thanks,
Shawn
Audio Signal Processors
software
SigmaDSP Audio Processors
v4.6 Sigma Studio
adau1466
Hello Shawn,
Sorry for the delay. I thought about this and reread your questions and I am not certain what the problem is?
Let me take some guesses and make some comments.
Writing any register in the part does not require any wait states with the exception of waiting for the PLL to lock.
How fast is your SPI clock speed?
Are you self-booting the part then trying to write to registers? Because, if you are then you have to place the comms port into SPI mode by doing three dummy writes?
Are you using SPI or I2C?
The other thing that might be going on is that you will not see the user bits until after they are sent out. I am not 100% certain but I think the registers are placed into a shift register to shift out during the 192 sample block. So depending on when the new data is written, it could take two 192 sample blocks before you see the data in the receiving device. That is not a long time but it is close to 10ms.
You should initialize the SPDIF TX first. Since the source of the bits is part of the initialization.
Dave T
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