Running program from SDRAM and Enabling Cache

Hi Steve,

We would suggest you to refer the “Cache Examples for ADSP-2156X” FAQ from below link,

ez.analog.com/.../cache-examples-for-adsp-2156x

It has Cache example code for ADSP-21569 processor.

Regards,
Anand Selvaraj.

Anand Selvaraj,

Is there an example to load/execute a program from SDRAM?

-Steve

Hi Steve,

We would suggest you to refer the “ADSP-2156x - DDR Sweep Test” FAQ from below link,

ez.analog.com/.../adsp-2156x---ddr-sweep-test

You can take this example code as reference and modify as per your requirement.

Regards,
Anand Selvaraj.

HI Anand Selvaraj,

The DDR Sweep Test does not appear to have cache enabled for SDRAM. The DMAs are taking about 5 times longer then expected to complete. This is consistent with what I am seeing on my platform that does not have SDRAM cached. The cache examples provided call out updates to the .ldf file to cache specific sections. Every .ldf seems to be configured consistently with seg_pmda

dxe_l2_pm_data PM 32
{
// L2 pm data.
INPUT_SECTIONS( $OBJS_LIBS(seg_pmda_nw seg_pmda) )
} > MY_L2_CACHED_MEM

dxe_l2_pm_data_bw BW
{
// L2 pm data.
INPUT_SECTION_ALIGN(4)
INPUT_SECTIONS( $OBJS_LIBS(seg_pmda) )
} > MY_L2_CACHED_MEM

I added seg_ext_pmda toMY_L2_CACHED_MEM and it had no effect.

dxe_l2_pm_data PM 32
{
// L2 pm data.
INPUT_SECTIONS( $OBJS_LIBS(seg_pmda_nw seg_pmda seg_ext_pmda) )
} > MY_L2_CACHED_MEM

dxe_l2_pm_data_bw BW
{
// L2 pm data.
INPUT_SECTION_ALIGN(4)
INPUT_SECTIONS( $OBJS_LIBS(seg_pmda seg_ext_pmda) )
} > MY_L2_CACHED_MEM

Is there any documentation on how to set up seg_ext_pmda to be cached?

-Steve

HI Anand Selvaraj,

The sweep test has a macro with the DMA addresses hard coded to 8 and 9 for DMA 0.

What values would be expected for DMA 1, 10 and 11 do not work?

void MdmaAccess(uint32_t uiSourceDMACFG,uint8_t* pSrcBuf,uint32_t uiSourceMSIZE,uint32_t uiBuffSize1,
uint32_t uiDestDMACFG, uint8_t* pDestBuff, uint32_t uiDestMSIZE,uint32_t uiBuffSize2)
{
MDMA_CONFIG(8,uiSourceDMACFG, (uint8_t*)adi_rtl_internal_to_system_addr((uint32_t)pSrcBuf,0), uiSourceMSIZE, uiBuffSize1,9,uiDestDMACFG, (uint8_t*)adi_rtl_internal_to_system_addr((uint32_t)pDestBuff,0), uiDestMSIZE, uiBuffSize2);
WAIT_FOR_DMADONE(9);
DISABLE_MDMA(8,9);
}

Thanks,

-Steve

Hi Steve,

This query is already handled in below thread. To avoid duplication of effort please continue the discussion there.
ez.analog.com/.../what-are-the-peripheral-ids-associated-with-the-4-dmas

Regards,
Divya.P