Runnning ADAU1772 eval board as Slave off APX555 analyzer
I got the ADAU1772 and APX555 to play nice I guess with SNR results from 85-87dB depending on the day... (?)
That was running with PLL circuitry enabled on the eval board and no MCLK sent from the APX555. Our project design though is that a host processor sends MCLK to the several ADAU1772 devices - so I am back trying to get this to work and not having any luck. Too many options to set and I don't know which are correct:
ADAU1772 programming:
Hardware on the eval board: zero ohms R3 and R2, C5 removed, APX555 sending MCLK to pin 2.
Register Control page:
Main Clock disabled, Crystal Oscillator Disabled, PLL Disabled, Main Clock Source set to External Clock, Output Clock set to MCLK (12.288MHz).
Signal Routing page:
Nothing changed. Input ASRC Disabled, Output ASRC Enabled.
Output/Serial Port Page:
LRCLK/BCLK Mode set to Slave.
MCLK is 12.288 MHz, LRCLK is 48 KHz, BCLK is 3.072MHz, no signal ADCdata0/1 outputs.
hardware
adau1772
Integrated/Special Purpose A/D Converters
Audio CODECs
Your reply from earlier thread (sorry all for the confusion of multiple topics in one thread):
The resistor R2 is not stuffed. So if you want to use the external master clock you will need to remove R3 and add a zero ohm jumper for R2. There will still be some capacitance due to the crystal and C5 but it should not be a problem.
You should not have to do this since the serial port uses an ASRC. I suggest you run the AP as a clock master and the ADAU1772 as a clock slave.
If you run the ADAU1772 as a clock master then you need to send the master clock from the eval board and the eval board is not setup to do that. So the AP will have a problem with no master clock. So the best way to run this part by far is as a clock slave. The ASRCs will follow the sample rate and the crystal will take care of the clocking of the ADAU1772.
Then you do not have to do any mods to these resistors and then undo them in the future when you want to run the board on its own.
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As received, my eval board had both R2 and R29 in series with MCLK from J4-2.
[Edit of 12-6 text] So the MCLK from the ADAU1772 could be utilized by the APX555 but you recommend not - perhaps because it would need a buffer(?) And you recommend not utilizing the MCLK from the APX555 to drive the ADAU1772 as likely not necessary. I had been confused by the Master/Slave terminology; thinking it was in reference to the MCLK purpose, not realizing that it is referring to what sources the Bit/LRCLK signals. If these codecs are used in something like the 3D/Binaural/ANC world is it still recommended not to use MCLK in any way? (when should it be used?)
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