ΣSigmaStudio Ask AI Русский Log in

ADAU1452 PLLFILT application Consult

SigmaDSP & SigmaStudio weifeng Feb 7, 2023 00:00 1 replies Original on forum ↗
Subscribe
weifeng Question
Feb 7, 2023 00:00

Hi ADI Tech Support,

Some questions about the application of ADAU1452 need to consult, thank you!

1. Currently, the description of PLLFILT foot connection is not very clear in the specification. Please help to check whether there are more specific materials to introduce PLLFILT. Like why do you do this? How to select the RC parameter of PLLFILT pin connection? What is the purpose of this connection?

2. During the power off of ADAU1452, the PLLFILT pin was found to have oscillating waveform. Please check whether the waveform is normal. Why does this oscillation occur?

3. To use ADAU1450(147.456Mhz, wo S/PDIF, wo ASRCs) instead of ADAU1452(294.912Mhz, with S/PDIF, with ASRCs), Will the 12.288Mhz crystal oscillator used externally be changed to another frequency? Do the PLLFILT pin connection and RC parameters need to be adjusted?

Audio Signal Processors

adau1452

hardware

adau1450

SigmaDSP Audio Processors

1452_PLLFILT.png
1452_PLLFILT.png
1452_PLLFILT_wave-when-power-off.jpg
1452_PLLFILT_wave-when-power-off.jpg
DaveThib Reply
Feb 7, 2023 00:00

Hello weifeng,

The designers had worked out these filter part values to satisfy the requirements of the PLL to lock to input frequencies within the range of valid MCLK inputs over all temperatures and silicon skews. There is no need to use different values. You need to use these values. The parts should be placed close to the PLLFLT pin and the nearby PVDD pin. they should be on the same side of the PCB and the DSP and do not use vias if possible.

I usually suggest to use NP0/C0G capacitors for good temperature stability.

Question 2:

The PLLFILT pin is the control voltage to the VCO of the PLL. So what you see is the PLL reacting to the first few master clock pulses as they come in. It has to calculate and lock into the crystal and this takes several iterations to lock. The lock time is given in the specifications in the datasheet. This is a normal signal until it locks.

Question 3:

The PLL settings and crystal frequencies are exactly the same for all the parts in the family. For the 150MHz parts there is a divider that is placed at the output of the PLL to drive the core at half the rate of the 300MHz parts. You do not need to change anything, no hardware and no software when changing between the ADAU1450 and the ADAU1451/52. The filter parts will be exactly the same.

Dave T