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DC Offsets Through ASRCs

SigmaDSP & SigmaStudio StasT Nov 6, 2023 00:00 2 replies Original on forum ↗
Thread Summary

Thread Summary

The user encountered large DC offsets in the ASRC outputs when switching between digital inputs on an amplifier design, despite force muting the ASRCs. The issue was resolved by following advice from a similar post, which involved proper configuration of the ASRCs. The user also noted audio quality differences between 48kHz and 192kHz sample rates, which will be addressed in a separate thread.
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StasT Question
Nov 6, 2023 00:00

Hello,

We've implemented a source select mechanism to switch between the three types of digital inputs on our amplifier design. We were noticing large, visible speaker excursions while performing switch actions, and to investigate further, we added readback blocks to view input values after passing through the ASRCs. To our surprise, but fitting the evidence, we saw huge DC offsets when the ASRCs should have been auto-muted. Even force muting the particular ASRCs over USBi made no difference in these values, and performing multiple readbacks in a row would not yield varying values, yet restarting the amplifier would show differences which appeared to be random in sign and magnitude. Occasionally we also saw zero values here (i.e. proper operation), but this was typically after these inputs had been used at least once - meaning valid I2S/TDM would be provided and then muted and/or removed, for example on Bluetooth (FSC-BT1026D) or USB (CM6212). Our first two inputs are from S/PDIF (we forget if these had offsets or not, but the others certainly do).

Apart from all else, why would force muting an ASRC ever result in a nonzero output? These are very large, significant values as well, and not tiny A/D offsets or some such. Muting does seem to kill the sound, so the process there is clearly working. Thanks for any help you can provide.

- Arthur, Lava Labs

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adau1452

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processors and dsp

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DCoffset.PNG
DCoffset.PNG
Harishgowtham Reply
Nov 7, 2023 00:00

Hello StasT,

Kindly look at this post and attach your project.

I will look into this further.

Regards,

Harish

StasT Reply
Nov 7, 2023 00:00

Hi Harish,

Thank you for the reply. We were able to get it working following that advice, which resulted in the included image. Our source select GPIOs on the left are high (the lower bit) per enabled source type.

We're having some audio quality issues related to sample rate - we're seeing a much bigger difference than expected at 48kHz vs. 192kHz - but we'll post about this in a separate thread.

- Arthur

ASRC_Lock.PNG
ASRC_Lock.PNG