SafeLoad-sequence for 'Boost'-filter block.
We have a FDSP schematic designed w. "LarkStudio".
A 'Boost' IIR 8-stage filter-block (peaking-filters) is used for audio equalizer functionality.
To enable run-time setting of audio-band properties,
the FDSP has to be partially reprogrammed/reconfigured using the SafeLoad mechanism.
This requires the IIR filter-coefficients b0, b1, b2, a1, a2 to be programmed into SafeLoad P0_[3:0], P1_[3:0], P2_[3:0], P3_[3:0], P4_[3:0] byte-wide registers.
The sequence we use for this is as follows (w. N=0 initially):
1) Take value of first SafeLoad-instruction address from LarkStudio FDSP schematic
2) write this address into "SL_ADDR" SafeLoad-address register
3) for filter-block N coefficients; write b0 value (float in '5.27' Q-format) into P0 registers byte-by-byte, b1 into P1 ...(and so on)
4) write 0x01 into "SL_UPD" SafeLoad-update registers to make the values take effect.
5) increment N and SafeLoad-instruction address by 1, and repeat from stage 2), for a total of 8 iterations.
This *should* update all 8 peaking-filters in the 'Boost' block.
Problem is, audio goes OFF (muted?) after this sequence is executed (by SPI-transfers from our microcontroller).
It is *not* a problem with the coefficients, because they are taken from LarkStudio -
and Lark seem to use exactly the same sequence of operations when we use it w. the ADAU1860 eval-kit.
I do not find any info on correct SafeLoad usage in the HW Manual,
but the ADAU145x datasheet states that SafeLoad-updates must be spaced at least 20.83us (one sample/frame at 48kHz) apart (?)
Is this relevant for ADAU1860 too???
TIA
hardware
safeload write
Integrated/Special Purpose A/D Converters
safeload
adau1860
Audio CODECs
peaking filter
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Hello Tia,
I am not the support engineer for Lark Studio but it is not all that different from SigmaStudio and the SigmaDSP for the questions you are asking about. I will alert the correct engineer but in the meantime I will make some suggestions of things to try.
There is one thing that stood out to me. Here is what you said:
ML7S said:
4) write 0x01 into "SL_UPD" SafeLoad-update registers to make the values take effect.
In the SigmaDSP parts you have to write the number of memory locations you need to move during the safeload. So you are just moving one coefficient.
I suggest you only update one of the Biquads at a time so write an 0x05 and only load in five coefficients.
In the SigmaDSP the safeload happens after the main program thread completes and is waiting for the next frame to start. This is why you have to wait the ~20us because that is one sample period at 48kHz fs.
Another reason for not getting too greedy to transfer two filters at one time is because if your program is close to max to run in one sample period this safeload can overrun the frame. Also, another detail is that if you try to write ten coefficients all ten must be located in memory right next to each other because safeload just increments the starting address and has no way to jump to another address. I think you are well aware of this but I thought I should mention it.
You also mentioned byte-wise transfers. This is where the ADAU1860 is different and the expert needs to chime in. The SigmaDSP is setup for word length transfers all being 32 bits and the memory structure is 32 bits so incrementing the address will point to the new 32 bit word. Makes it easy.
I will alert the support engineer for this part.
Dave T
Hi Tia,
As Dave mentions, the filters will be updated while it waits for the next frame to start, so you have to wait for one sample after you send the SL update command before writing the next coefficients. If you try to update them faster than that, it is possible that not all instructions are updated and the coefficients are getting mixed up.
Regards,
Roberto
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