process structure in 1787 fast dsp FDSP
What is the process structure, with respect to number of bits in internal datapaths and memory and accumulator, used by the 1787 FDSP when executing a series of consecutive biquads? I imagine it is similar to the structure in the SDSP, shown in the figure below, but the details must be different because:
FDSP has 32-bit parameters
FDSP is said to have a "54-bit fractional precision" biquad instruction, but also,
"double length memory" so the core can "perform double precision arithmetic with double length data and single length coefficients".
Would very much appreciate any light that can be shed on this.
fast DSP
hardware
ADAU1787
fdsp datapath
1787
1787 FDSP instructions 64
Integrated/Special Purpose A/D Converters
fdsp accumulator
Audio CODECs
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Hello User2,
The diagram you show is for the SigmaDSP core not the fast core but I am sure you know that. The fast core is not a general purpose DSP nor is it a DSP core optimized for audio like the SigmaDSP core is. It is essentially a filter processing engine and the details shared in the datasheet is all I can say about it. The single precision is a 27 bit fractional and the double are 54 bit fractional precision. There is an even lower precision setting for power savings.
You profile is lacking much information, not even a name, the company you state is vague, the email address is very strange so I suggest you contact your local ADI rep and strike up a relationship with that person. Then you can work up an NDA and we can help you realize success in your project.
I cannot share any more information on an open forum then what is already in the datasheet.
Thanks,
Dave T
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