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External SPI Delay on multiple channels shared with SRAM?

SigmaDSP & SigmaStudio SebMa Aug 13, 2024 00:00 3 replies Original on forum ↗
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Thread Summary

The user is planning to build an algorithm for the ADAU1466 to achieve up to 1 second delay per channel at 96 kHz for 8 outputs. The main limitations are the SPI bus bandwidth and the number of supported SPI channels. The final answer suggests using 16-bit data to reduce bandwidth requirements and potentially cascading two ADAU1466 chips to increase delay capacity, as the ADAU1466 supports up to 6 SPI channels and cannot handle 8 delayed outputs at 96 kHz. The user considers cascading two chips as a viable solution and inquires about future chip releases with higher capabilities.
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SebMa Question
Aug 13, 2024 00:00

Dear ADI community,

I'm currently planning to build an algorithm/architecture for the ADAU1466 where each of 8 outputs gets the option to set up to pretty high delay at 96 kHz (up to 1 second per channel, if possible).

By doing this, I do currently have two limitations where you may can help me in discussion:

1) When working at 96kHz and using the external SPI Delay Module (which is necessary when using a delay greater than 400ms), I would need 8 delayed outputs at 96kHz which means that I will have a rate of 96.000samples/s * 32 bit * 8 = 24.576MHz, which is more than the SPI bus at ADAU1466 is supporting, right? Do you see any other option to bypass this limitaion?

2) When using 8 outputs, I first thinked about using one 4MBit-SRAM memory per output. But unfortunately, the ADAU only supports up to 6 SPI channels (which wouldn't be sufficient given the fact that there will be a EEPROM + a microcontroller to realtime-change and read out values. Therefore I was thinking about sharing one memory for two outputs (e.g the Microchip 23AA04M, which is a 4,096 kBit SRAM). This would mean I get buffered about 128.000 samples per chip which means 64.000 samples per channel --> around 660 ms per channel. But the big question: Does SigmaStudio support sharing 4 SRAM-chips for a total of 8 outputs? I've read in this forum that there have been limitations in the past about SPI-Delay (You can only use multiple channels at one chip if you're actually setting the same current delay on both channels, there is no multi-RAM-concept supported yet, etc..).

Would be very happy to get some feedback/help from your side.

Best regards

Sebastian

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DaveThib Reply
Aug 13, 2024 00:00

Hello Sebastian,

Have a look at this recent post where I responded with a study I did.

(+) How to use External SPI Delay Module on ADAU1452 with SigmaStudio Dev.Tool? - Q&A - SigmaDSP Processors & SigmaStudio Dev. Tool - EngineerZone (analog.com)

You will not be able to read and write 8 channels per sample period at 48kHz never mind 96kHz. It comes down to pesky physics and time.

Yes, you can use more RAM parts and use another SS pins to address them but the problem is that it will require a new SPI transaction for each part and that just makes the problem even worse.

To get longer delay times you may have to go down from 32bit data to 16 bit data to pack two channels into one 32 bit word. That helps and you can do that with the internal RAM delays as well. I documented some of these data packing tricks on other posts.

I also worked out a way to stretch delay times but the side-effect is it decimates the sample rate. I developed it for a customer who needed it for a subwoofer so it worked out there. Usually, it is not helpful.

If you can limit the bandwidth of the delay signal then you may be able to run the external RAM delay in a lower sample rate thread to get more time.

I wish I had some better news. I do know of one customer who used an ADAU1701 just for a delay line. You certainly could do that with another ADAU1466 to be used just for delay. With two DSPs and each one can have its own external SPI RAM would get you a lot more delay. but, it is a lot more parts...

Dave T

SebMa Reply
Aug 17, 2024 00:00

Hi Dave,

thank you very much for your answer. Glad to hear I'm not the only one struggling with this limitation. Actually for me it sounds as cascading two chips seems like the best option to me... (by just splitting output 1-4 to chip 1 and 5-8 to chip 2). This enables me to double the max delays, but of course increases cost and complexity. If there's another (more powerful) chip coming soon or already released which will work similar with SigmaStudio, please let me know. :-)

Best regards

Sebastian

DaveThib Reply
Aug 17, 2024 00:00

Hello Sebastian,

I suggest you contact your local Analog Devices sales office and strike up a relationship with your local support person. I think it will be the Munich office in your case. (I did look up your location)

Thanks,

Dave T