ADAU1701 as master and WM8782 ADC and PCM5102 DAC as slaves possible?

Okay I was overthinking things and didn't quite understand the master/slave setup.

The ADAU1701 can be setup as master for the DAC while the ADC can be a master for the i2S input side. So this is the setup that works:

ADC:

Set as master

24 bit

set jumper to 48 khz

remove the clk jumper

inject mclk from the adau. You will find a pin on J4 of APM2 called mclk. in wondoms documentation it says its a input only. However, they themselves use it as an output in one of their video tutorials and it works as such. i suspect that pin is connected directly to MCLKIN on 1701 and therefore also the crystal output.

Connect lrclk, bclk and data from adc to appropiate pins on J4 of APM2 (ideally they should all be twisted pairs with a gnd wire, but hard to achieve with only one GND pin on the ADC and this seems to work to a point where no noise is added beyound the noise floor of my current amp).

Leave the solder bridge on the back of the ADC disconnected. This sets the output to i2S format.

DAC:

Set the back jumper bridges as shown here

Short the front solder bridge for a 3 wire i2S connection (I have not tried without it. it may work, but then you need to inject mclk to both the ADC and DAC)

Connect lrclk, bclk and data to appropiate pins on J4 of the APM2

APM2:

Do NOT jump lrclk in and out, same for bclk in and out. No jumpers required as adc is not a slave but master.

Set the hardware settings as follows:

Frame syng freq. = /1024
BCLK Freq. = /16

I choose to mute the internal ADC and DAC as I wont use them. They are crazy noisy on my unit at least.

All in all this setups works great. Much better performance than the build-in ADC and DAC on the adau1701, at least in the APM2 implementation. Only gripe I have is that the adc starts clipping when I go beyound 60% volume on my Desktop pc which is currently the source.

NOTE: When the programme (ICP5) is connected to APM2 there is a clear ground noise. disappears as soon as the programmer is diconnected.

Hello DannerD3H,

I apologize for missing this post. It was not in the usual forum for this part but you did put it in a logical place. Next time use this space: Q&A - SigmaDSP Processors & SigmaStudio Dev. Tool - EngineerZone

Everything needs to be on the same master clock. From my quick read of your posts it looks like that is what you eventually did.

With the 1701 you must be on the same master clock and there are no sample rate converters.

It is best to have the ADC be the clock master for I2S clocks (BLCK and LRCLK) and it is best for the 1701 to be the master for the clocks and data going to the DAC. Again, BCLK and LRCLK. This gives you the best timing margin.

You mentioned that it looks like the ADC is clipping early. This might be an issue with the data format settings between the two parts.

It looks to me that you have the 1701 set properly but I cannot vouch for the ADC settings. Looking at it on a scope will help you see if it is clipping or if there is one more bit missing. This post I wrote you might find helpful for setting up a scope for looking at the I2S signals.

How to Take Meaningful Screenshots of I2S Audio Signals - Q&A - Audio - EngineerZone

One bit is 6dB and -6dB is half voltage. +6dB is double the voltage. So this is a clue. However, it could simply be that the ADC is setup to have a lower level be full scale and the computer is putting out way too high of a level. Looking at the digital data stream will help answer that. Another way is to measure the peak voltages at the pin of the ADC input and see how that relates to what the ADC datasheet says is a full scale voltage. For me, I just look at the data but I look at this stuff so much that I know what full scale data looks like. (I know, I have an appointment with my psychiatrist about it. LOL)

My hats off to you!! Great project and great work! You did awesome by just starting halfway with having the DSP generate a signal and getting the DAC to work. Then moving to the ADC side once the DAC side was proven. Well done! Did you watch my Troubleshooting video on YouTube?

Dave T

No worries, I wasn't expecting an answer, I was just explaining what I did if anyone else would ever need it :)

Yes the ADAU1701 PCB provides the MCLK for both ADC and adau1701.
ADC is set as m-a-s-t-e-r to generate its own LRCK an BCK.
DAC's are set as s-l-a-v-e and PLL mode. So they recive BCK and LRCK from the ADAU1701. They do not recive MCLK as it isn't needed for this particular DAC.

As far as I can see the data formats are set correctly.. I simply suspect the quality of these china PCB' /implementations. That being said, i really need to get myself a scope and learn how to use it to be able to see whats going on. Especially now with my own DSP design.. Thanks for that link, that surely will come in very handy later!

Thanks! I hope my own DSP and DAC/ADC will work better than this spaghetti monster.. time will tell xD will first test the dsp with this ADC and DAC so expect no difference in performance. But then I can hopefully verify if the DSP works as I know the other two parts "work". Then I will go for the DAC and ADC board :)