adau1777 crack noise with dac_sdata fixed value

Hello AnaCow,

I just responded to another post that you also responded to. So there will be some duplication.

(+) ADAU1777 ticking noise - Q&A - SigmaDSP Processors & SigmaStudio Dev. Tool - EngineerZone

Thanks for the information. It is some of the information I asked for in the other thread. There is a LOT of overshoot in the data. This tells me you probably do not have any damping resistors in the design? There may also be some not so good placement of bypass caps and vias in the PCB layout. There may be a lot of ground bounce and noise on the power rails. All of this can cause bit errors to creep in and this is most likely what is going on.

What sampling rate are you operating at? Not the core but the serial port?

I suspect you do not have software for doing signal integrity analysis on the clock and data transmission lines?

Dave T

Hello Dave T,

Thanks for your support. The serial port works at 192KHz. In fact, I attempted to capture the bclk colck to see how the dac_sdata bit clocked in, but failed, beacuse when I placed the probe on the PCB line of bclk colck, the noise vloumes up and becomes noisy. Below picture shows the PCB layout of adau1777 part, and the 33ohms damping resistors are paleced. Could you please help us review this design?

The overshoot in the data maybe caused by a long cennection of the probe grounding. Yes, I do not have such softeware to do SI analysis, do you have some good selections.

Hello AnaCow,

It is going to be difficult to get the data transmission perfect at 192kHz. The timing margines are very small. So everything has to be perfect. I need a little help with your PCB layout. I cannot tell where pin 1 is on the part and what is on the top layer and what is on the bottom layer. Is this just a two layer board?

It is tricky to place the bypass caps properly on these small BGA parts. It looks to me like you have ground pins tied on one side of the board and also on the other side of the board. This may not be the best.

Are there vias in the pins?

Also what is the direction of the audio in the serial port? Both directions in and out of the part? What is the direction of the clocks?

For running at 192kHz this will be important.

Dave T

Hello Dave T,

Thank you for your support. I will add some notes on the layout pictures. This layout has four layers which are top, ground, ground, and botttom respectively. Then, the top layer has all the components assembled on it, and there are no components assembled on the bottom side.

*Top layer

*Bottom layer

*Inner GND 1

*Inner GND 2

There are no vias in the pins. Yes, both directions in and out of the part. This part has a block clock in direction.

I did not get the point of "It looks to me like you have ground pins tied on one side of the board and also on the other side of the board. This may not be the best. " . Does mean top layer and bottom layer about the side here?

Hello AnaCow,

Have a look at some of the things I mentioned in this recent post:

(+) ADAU1452/1466 - Bypass, Decoupling, PLL and reservoirs - Q&A - SigmaDSP Processors & SigmaStudio Dev. Tool - EngineerZone

Also look at this document I wrote a few years ago:

(+) PCB Layout Best Practices for AD193x codecs - Q&A - Audio - EngineerZone

The concept of having only traces between the pin and the bypass cap then connect to the ground plane using a via only after the cap is important to keep the ground and power quiet. Also, I want to add to not let the ground fill on the top also touch the trace between the pin and the cap until after the cap.

You may also want to increase the drive strength on and data and clock pins on this part and the part it is interfacing with. This will affect the timing and give you a little more margin to deal with.

I did not study this long enough to see the data and clock paths on the PCB. You should try to minimize the lengths and any right angle turns and vias on all the clock and data lines. It is impossible to do this perfect but any improvement might be enough to avoid these clocking errors.

Dave T

Hello Dave,

Thanks for your kindly suggest, and I got these points. I increased the driven stregth of clock and data of adau1777, the clock is rising more quickly, and I need also to increase the data strength from dsp side later. Regarding the length of clock and data lines on the PCB, it is about 140mm on my base-board, and I used a adsp21569-som evl board, it may be about 40 or 50mm or else. When I pan to redesign the PCB Layout, I shall read above Layout suggestion carefully. Thank you very much.

By the way, how can I call the API function to increase the data driven strength from ADSP21569-SOM?

Thank you very much.

AnaCow

Hello Dave,

I was redesigning the layout recently, and i read the layout the above document of adsp1466, but it's too long and i'm not sure i would not miss any things. So, i need you to help me review my layout work. This is a new 6 layer PCB, and there are signal-ground-signal/ground- power/ground-ground-signal layers. First, i placed the bypass caps as colse as possible to the supply pins of adau1777. Then, i moved the ground plane on the pin of adau1777 as you advised. Third, i drilled the vias of supply pins before thier bypass caps.

Before the layout work, i want to ask a question about how to deal with the unsed digital MIC pin of DMIC0_1/MP4 and DMIC2_3/MP5. I read the datasheet about the analog inputs, it says the unsed analog MIC pins of adau1777 need to be connected to the VCM pin or ac-coupled to ground, as below shows. There is no doubt about the analog MIC input pins, but how about the unsed digital MIC input pins. It comfused me because the digital MIC pins DMIC0_1, DMIC2_3 are also memtioned here. Are these digital MIC pins just open when unused? Or need to deal with them like the unused analog input pin does?

Now, we can go back to the layout work. Below pictures show the details of this layout, please take a look at these.

overall view of adau1777 layout

top layer

inner 1 layer

inner 2 layour

inner 3 layer

inner 4 layer

bottom layer

Thanks very much.

B/R

AnaCow

Hello AnaCow,

This layout looks great to me. I also noticed that we should of had a ground pin next to the IOVDD pin! The designers must have made this tradeoff. Adding a pin adds a lot of cost and would probably make the internal layout tricky. Anyhow, I digress.

Your questions about the DMIC pins. Those are digital pins so treat them like a digital input. you can leave them unterminated and floating. However, it is good practice to ground them. This will prevent any noise from getting into the part and possibly causing issues. For automotive uses you cannot leave any pins floating because they test the cars by hitting them with high levels of RF to ensure RF immunity.

For pins that are definable with registers, (MP Pins) it is good to make sure they are set to be a digital input and then ground it. Most of the time those sorts of pins will default to an input. Any digital output pins that cannot be changed to be an input you should either leave them floating or terminate them with a resistor to ground. Usually 1K or up to 10K is fine. But, I do not think you have to worry about this with this part.

Dave T

Hello Dave,

Thanks very much. Yes, i also noticed that there is no ground pin next to IOVDD pin of this chip comparing with other supply pins as below pin mapping shows. There is just one IOVDD pin alone, and aslo the CM pin has no ground pin. Is the CM pin a internal reference output? I read the datasheet about CM pin that it is a analog output pin and should decoupling to ground with caps. Should i coneect the ground side of these caps to the next AGND pin like i did on other supply pins and share the common ground pin with AVDD? Or, is it just OK that i did above?

B/R

AnaCow