RE: i2s from or to ADAU1401 or ADAU1701
Hi! Can you please explain how connecting LRCK and BCLK in/outs would work when I2S out is a master?
Imagine the following: There is an external i2s source, a master, driving the clocks. MCLK is the clock source for the DSP, and this external device also drives all the other signals, LRCK, BCLK, Data.
Imagine that I also have an external DAC or Amp chip with I2S slave input. I have 2 options:
1.: Connect BCLK and LRCK in/outs on the DSP, also feed these signals to the DAC/Amp and connect Data out to the DAC/Amp and have the I2S output as a slave on the DSP.
2.:The DSP can act as an I2S master on the output side, in this case the DSP can and will drive BCLK and LRCK outputs. If I connect these 2 signals to the input side, its gonna be fine probably because they are in phase sync but there is still 2 devices driving the same node and that is never a good idea.
MCLK is always shared between all devices and its coming from the input device.
Did I miss something? Correct me if I'm wrong but I would never want to connect the clocks if the DSP output is a master.
Should I always use I2S output as a slave to the input side if I have an external master MCLK?
Thank you!
Edit Notes
Split off the post from another thread since it drifted from the original thread. , DaveT
[edited by: DaveThib at 2:59 PM (GMT -4) on 28 Mar 2025]
Thread Notes
DaveThib - Moved from Audio to SigmaDSP Processors & SigmaStudio Dev. Tool. Post date updated from Wednesday, March 26, 2025 6:40 PM UTC to Friday, March 28, 2025 2:57 PM UTC to reflect the move.
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Hello Szasza,
I am a little confused about exactly the connection you are asking about?
Diagrams would be helpful.
I will make a few comments based on the things you mentioned.
It is good for sure to connect MCLK to all parts involved. This way they all run at the same rate.
However, if you take two parts, even two identical parts, and run them from the same MCLK and set them to be a clock master and look at the LRCLK from both parts on a scope you will see that the edges of the LRCLK will not match. This is because the internal counters that count the MCLK cycles to develop the LRCLK signal will not be started at exactly the same time. So they will not drift from each other but the edges will not line up.
The ADAU1401 and ADAU1701 are early designs of serial ports so they are not super flexible. The serial data output port can be a master or slave. The serial input port is always a slave. So if you set the serial output to be a master then you have to externally jumper over the clocks to the serial input pins. There is no way to get an internal connection.
If you are driving an amp or DAC chip and they need to be a slave, By the way, this is the best way to run it, then set the serial output port on the DSP to be a master.
For the DSP serial input side?... Where is that data coming from? Is it I/V feedback from the amp? If it is then just jumper the clocks from the serial output port over to the serial input port clock inputs.
If it is coming from something else like an ADC. Then it is best to have the ADC set to be a clock master and send it to the DSP serial input port clock pins. Of course, you have to have all parts on the same MCLK.
Does any of this help?
Thanks,
Dave T
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