ADAU1701 IIS input 192Khz signal to enable filter, DAC playback has noise

Hello Hogan,

The 1701 's fundamental clock is the MIPS clock, which always operates at 49.152 MHz (roughly 50 MIPS) for any "standard" sample rate (48 / 96 / 192 KHz). The only exception is when a sample rate of 44.1 KHz and its multiples is desired -- in that case the chip runs about 8% slower, at 45.1584 MIPS. Your crystal and PLL settings need to produce a 49.152 MHz MIPS from your hardware MCLK or crystal input.

As you know, the base 48K sample rate allows for 1024 instructions. 48000 times 1024 equals the 49.152 MIPS rate. Switching to 192 KHz allows for only 256 instructions, because 256 x 192000 still equals 49.152 MHz. The chip doesn't run any faster, so you must trade off some program capacity for sample rate. You set the tradeoff in SigmaStudio's hardware config screen, which in turn sets the core control register in the -1701. No hardware changes at all. You can run 48 K, 96 K, or 192 K with the exact same crystal and PLLMODE pin settings.

Unfortunately, figure 12 on page 18 of the ADAU1701 data sheet is confusing. It makes it appear that you must alter the PLLMODE pin configuration to change the sample rate. This table would make sense if it were set up like this:

Thus, with a 24.576 MHz crystal, both PLL_MODE0 and PLL_MODE1 should be pulled up. If you have PLL_MODE0 grounded, you're overclocking your ADAU1701 by a factor of two! This may explain the subpar performance you're experiencing.

For nominal operation, first either pull PLL_MODE0 high or replace the crystal with a 12.288 MHz one. Then, go into your SigmaStudio HW Configuration, Register Settings window and change the Program Length to 4x. You'll only have 256 instructions to work with, but that's the breaks.

Best regards,

Bob