Setting Status bits for the SPDIF TX
Thread Summary
The user is trying to configure the ADAU1467 SPDIF transmitter to output professional AES3. The final answer confirms that the ADAU1467 is not designed for AES3 professional specifications, as stated in the datasheet. The user's attempt to set the LSbit of the lowest address register (0xf6a0 for left, 0xf6b0 for right) to indicate AES3 was unsuccessful due to this limitation.AI Generated Content
I am trying to set the SPDIF transmitter of an ADAU1467 device to output "professional" AES3 - I have found the registers for setting the Channel Status (Left and Right) but I'm not sure how the bit contents of these 12 x 16-bit registers map to the bit definitions (bit 0 to 191) in the AES3 specifications. would I be correct to assume that the LSbit of the lowest address register (0xf6a0 for left, 0xf6b0 for right) would be bit '0' ?
I have tried setting this bit, which is supposed to be '1' for AES3 or '0' 'S/PDIF' but our "Prism Dscope" test unit does not report it as such.
Any advice of pointers to documents/examples would be gratefully received
PhilipJ
Audio Signal Processors
hardware
adau1467
SigmaDSP Audio Processors
Hello philipj451,
I really wish this was not true. I come from the pro audio world but the interface is not designed for the AES3 pro specifications. It is mentioned in the datasheet.
Dave T
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