Power sequence when external clock is provided
Thread Summary
The user asked if the MCLK input would be ready before PVDD stabilizes when using a 3.3V external power supply for IOVDD, PVDD, and AVDD, and a 1.2V supply for DVDD. The final answer confirms that the MCLK input will be available before PVDD stabilizes, as shown in the timing diagram on Page 31 of the ADAU1452 datasheet.AI Generated Content
Hi,
The power tree for the ADAU1452 is as follows:
Same external power supply (3.3 V) for IOVDD, PVDD, and AVDD and also for the external oscillator that will feed MCLK pin.
External power supply (1.2 V) for DVDD.
As the external oscillator will be feed from the same 3.3 V than in PVDD, it is safe to say that the MCLK input will be ready before PVDD stabilizes?
adau1452
hardware
processors and dsp
Processors and Microcontrollers
Hello,
Yes, it is safe to say that the MCLK input will be available before PVDD stabilizes.
Please refer to the timing diagram below (Page 31 of the datasheet), which illustrates the recommended power-up sequence.
If you have any further questions, please let us know.
Regards,
Harish
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