ADAU1701 with ext DAC stressed by EMI of Class-D AMP!?
Hello,
i run an adau1701 ("sure dsp board") with two external ADCs (PCM1802) and two DACs (PCM5102) via I2S. ADAU is the master feeding LR and Bit clocks to the four converters. MCLK comes from an external oszillator. at the beginning i had huge random spikes on the analog output signal, which vanished after i put buffers (SN74LVC2G34DBVR) in the LR and Bit clock lines as suggested somewhere here on ezanalog. so far everthing runs perfect.
i drive 2 classAB and 2 class-d amps, which are not in an extra case but somewhere near to the dsp as everything needs to be built in in the housing of the loudspeaker.
class-d is a IRS2092 based amp board in, i think, reference design. Its frequency is around 410kHz. ouput lowpass filter as in the reference design. (IRAUDAMP7S, https://www.infineon.com/dgdl/iraudamp7s.pdf?fileId=5546d462533600a40153569addc92bfb page 25). speaker are 8Ohms.
as long as i keep the volume moderate everything is fine, however when i increase the level there are "random" spikes, of course very audible.
i put the dsp/converters unit in a small steel box and put the class d amps further away (approx 40cm) and now the same problem still occurs however at higher levels.
i assume that it is caused by EMI ...!?
i suspect the problem being the line from ADAU to the DAC cause i also have the problem when i generate the testsignal out of the adau (via sigma studio)
so far the data line of the I2S is not buffered but goes directly from adau to dac, (on the dac board is a 33ohms resistor in series).
as i use the four gpios of the adau with some potis there are some wires, along with power wires and analog signal in and out which could work as antennas catching unwanted electromagentic waves generated from the AMPS ...?
any suggestions appreciated...
Audio Signal Processors
SigmaDSP Audio Processors
adau1701
Hello vita,
Of course I am going on very little information and also not have seen how all this was done. A picture or two might be good.
It is also good to take screenshots of the serial data as close to the DAC as possible. Look at my post about how to do this might be helpful. https://ez.analog.com/thread/87319-how-to-take-meaningful-screenshots-of-i2s-audio-signals
I suspect that you simply ran several individual wires for all the digital signals over to the DAC? To keep the impedance of the transmission line somewhere in the "defined" category rather than the "undefined" category, you need to run ground wires along with the signal wires. As close as possible to them. What works best is to use ribbon cables and alternate between signal and ground wires. This will help reduce the reflections and give the return currents a path to follow.
What may be happening is that there are a lot of reflections and so the waveforms do not have clean edges so they will be close to double triggering or not being read properly. So any little interference of noise on the line will make it cross the threshold early or cross it too late cause data errors.
What is the sampling rate? Anything above 48kHz will be more difficult to transmit over this distance with ne errors. So give the ribbon cable a try and see what you get. Also post some pictures of your setup and your waveforms.
Dave T
sorry for the late response.
i had once very quickly looked at the lrclk and bitclk with the scope and both locked okay, as far i could tell. i'm still a beginner on the topic so yet i do not know how to scope the data line. currently i do not have the hardware available, i might try it again one day in future.
I suspect that you simply ran several individual wires for all the digital signals over to the DAC?
yes, currently no ribbon, however traces are relatively short, say around 3cm.
as i have put buffers (SN74LVC2G34DBVR) in the LR and Bit clock lines, i wonder if there should also be one on the data line??
Hello Vita,
The fast response and low impedance of the 74LVC2 buffers may encourage ringing even on 3 cm wires. Perhaps you might try damping resistors (about 33 ohms) in series at the source end of the I2S signals -- the buffer outputs. Series resistors t the DAC inputs won't help. This post may be helpful:
Damping Resistor(s) for MCLK Distribution
Best regards,
Bob
Hello Vita,
Yes, put one on the data line. I always suggest that you process the clocks and the data in the same way to maintain their timing relationship.
Dave T
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