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I2S resistors requirement?

SigmaDSP & SigmaStudio joe42 Aug 2, 2016 00:00 6 replies Original on forum ↗
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joe42 Question
Aug 2, 2016 00:00

I understand that low-value I2S resistors are often used to limit rise/fall time of signals, and therefore reduce high frequency emissions. They're present on most, if not all of the EVB's.

Is there a rule of thumb for when these are recommended? For example, a speed or trace length? I've heard they should go near the source (whatever is driving the pin), but I'm not sure if that really matters.

hardware

i2s

matthijs Reply
Aug 2, 2016 00:00

In general they're needed to match the output impedance of the driver to the characteristic impedance of the PCB trace. Often drivers are a bit too strong (too low impedance), resulting in overshoot/ringing especially on longer pcb traces. If that happens with a clock signal, this could trigger false transitions and make a big mess of things. Overshoot may also be harmful for ICs, especially if the I/O voltage is actually already outside the comfort zone of the recipient.

When needed, they should indeed be placed as close to the driver as conveniently possible. Whether they're needed or not is a bit trickier to estimate, and I suspect they're often included just to avoid the headache of figuring out whether they're needed or not. If they're included in the PCB you can easily adjust their value later on, including to 0Ω. If they're not included and it turns out you do need them, you have a bigger problem.

In general to be sure whether they're needed you'd need to run a simulation based on the PCB layout and simulation models (e.g. IBIS) of the components involved.

matthijs Reply
Aug 4, 2016 00:00

It is also worth mentioning that output drivers may also be software-configurable, which means you can just alter a register to get an effect similar to including a series resistor. For example the ADAU145x lets you select from four different drive strengths, configurable per pin in the "hardware interfacing registers" (0xF780 - 0xF7A3), and moreover the slew rate.

Unfortunately the meaning of the values is only vaguely described. There's some statements about drive strength in the electrical characteristics but they don't make sense to me. Ultimately it looks like the IBIS data is the only useful reference to interpret the choices.

I'd love to be able to recommend a free IBIS viewer that doesn't suck... but I haven't found one yet.

KJBob Reply
Aug 10, 2016 00:00

You could also find a good resistor value by test, as shown here:

Damping Resistor(s) for MCLK Distribution

Best regards,

Bob

joe42 Reply
Aug 10, 2016 00:00

Thanks. I'll add them as a precaution for the longer traces. My MCLK, especially as output from the ADAU1452, is already quite "soft" (sine-like), so I doubt a resistor would be helpful here. Maybe I'll add one anyhow.

matthijs Reply
Aug 16, 2016 00:00

The default drive strength is "lowest", so this doesn't surprise me.

I should maybe add another clarification on drive strength vs slew rate: there is sometimes confusion between these two as on a short unterminated line they may seem to have similar effect. The reason is that such a line behaves predominantly capacitive, especially if weakly driven. Reducing the drive strength therefore decreases the slope, although it should take on more of an exponential curve as you'd expect from an RC circuit while slew rate limiting should result in more of a trapezoid.

If the slew is sufficiently fast relative to the round-trip time of a signal (i.e. longer lines make this easier to see) then you should see that the "RC curve" resulting from underdriving is actually a staircase composed of reflections. Reducing the drive strength doesn't (or shouldn't) affect the slope of each step, but it does reduce the height of each step, hence the signal converges more slowly overall.

Overdriving the line (output impedance < characteristic impedance) causes the first step of the staircase to overshoot, the next step tries to correct that but again overdoes it, etc. When the line is short and the signal is smoothed out by slew rate limiting and non-idealities the result may look like a simple damped oscillation, i.e. ringing.

If the driver is perfectly matched, then the staircase has only two steps when measured at the driver: in case of a rising edge there's one step from 0 to vdd/2 (since the output impedance and the characteristic impedance of the line form a voltage divider) and when the full reflection from the unterminated end arrives it steps from vdd/2 to vdd. When measured at the end of the line these two steps coincide hence the driven signal arrives fully intact (but only at the end of the line!).

On a terminated line the story changes dramatically, since then the line behaves like a pure resistor, not remotely like a capacitor. Since there's no reflection coming from the end of the line, it just stays on the first step of the staircase described above. This means that output impedance then has no slewing effect whatsoever and only affects voltage swing.

All this assumes idealized driver, line, and receiver. Your mileage may vary when applying it to the real world.

joe42 Reply
Aug 16, 2016 00:00

Thanks for such a thorough response! Without a resistor on the clock output (and pin drive strength low) everything seems to work well, but as a precaution I may add one anyway, as the traces are pretty long (10-15cm). Easy enough to use zero ohms if it's not needed.