ADAU1452 & SIGMA STUDIO 3.12V4 - DELAY MODULE ERROR

It appears that there is a problem with the generated files when you use too much of dm0 delay

The specified item was not found.

You load your application into the DSP using

- the USBi (which is used as a SPI master)

- a MCU as SPI master

Both use the SPI format which is specified into the datasheet of ADAU1452. (I have rev C datasheet).

A funny thing, is that the datasheet is false regarding the spi mode used

byte1: 7 MSB bits= chipAddress which is always 0, LSB= Read or /Write bit

bytes 2 & 3: subAddress

bytes 4 & n: data

So the subAddress is 16bit, you can access 0 to 65535.

The dsp auto increment the address you give to put the datas at the right place.

When you export the C headers, look at the file named *_IC_1.h and see the export function default_download_IC_1.

The SPI write function used inside of default_download_IC_1 is the following:

SIGMA_WRITE_REGISTER_BLOCK(chipAddress, subAddress, number of data to write, pointer on first data );

You can see what happens when you write your program into the DSP:

There is a bunch of initializations, they you have:

SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, PROGRAM_ADDR_IC_1, PROGRAM_SIZE_IC_1, Program_Data_IC_1 );

SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, PARAM_ADDR_IC_1, PARAM_SIZE_IC_1, Param_Data_IC_1 );

SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, DM1_DATA_ADDR_IC_1, DM1_DATA_SIZE_IC_1, DM1_DATA_Data_IC_1 );

And a bunch more initializations.

On the 2nd ligne the thing called Param, is in fact DM0_DATA. It just shows that the export function is not really up to date!

PARAM_ADDR_IC_1 = 0. It is the subAddress of DM0 memory.

You see what happen next. For example, in the case PARAM_SIZE_IC_1=80000.

You write things from address 0 to 79999.

For example the subAddress of DM1 memory is 44164.

When you set it (3rd line), you overwrite part of your DM0 content.

So your application do not work, because of that.

You can use an external SPI delay, but I'm not sure you can have a variable amount of delay then. Perhaps you can only have a fixed before-hand amount of delay.

The datasheet say delay up to 0.8s at 48kHz sample frequency.

If you use all the DM1 memory (let's say 19200 samples) for a delay and you use a 48kHz sample rate, you have a 0.4s delay.

So unless someone successfully used DM0, the datasheet is false about that

There is a thread about DM0 delay here:

How ADAU1452 use DM0 RAM memory?

Date is 11 nov. 2013.

Best regards,

Simon

I've just read from the datasheet:

49'152 to 57'343, 8192 words, Program memory, 32bits word

0 to 20'479, 20480 words, DM0 (Data Memory 0), 32bits word

24'576 to 45'055, 20480 words, DM1 (Data Memory 1), 32bits word

I forgot that the memory was addressed in 32bits word. I'll update my previous answer accordingly. (Well, it seems that I can't do that when someone else already answered)

Those 3lines are doing the following things:

Line 1, write program from address from 49152 to 49152+10948/4=51889

Line 2, write DM0 from address to 0 to 0+59980/4=14995 (no data written at 14995)

Line 3, write DM1 from address to 45044 to 45044+16/4=45048

No overwrite.

It seems that the more DM0 delay you use, the more data you have to write into DM0,

and the more DM1 delay you use, the less data you have to write into DM1.

In this example, you don't have to write something into DM1 at all, while you write 81920byte (it's the whole DM0 memory because 81920/4=20480) into DM0! It's quite retarded, because there are 8 non-zero values (located very near to the end) and 81912 zero values.

I remember that several days ago, that schematic failed to load into the ADAU1452. Now, it works. Perhaps you should try to upload your code several times, and see if the sound pass-trough?

This delay is the longest you can do: a 0.852s delay with a sample frequency of 48kHz.

So the datasheet was right about the delay (it's SPI slave section is still false in rev C).

If you want more, you have to use the SPI external delay, or decrease the sample frequency.

Best regards,

Simon

Hi! thanks for your answer...i am not sure if I fully understand your statement.

This is what I have:

SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, PROGRAM_ADDR_IC_1, PROGRAM_SIZE_IC_1, Program_Data_IC_1 );

SIGMA_WRITE_REGISTER_BLOCK_S( DEVICE_ADDR_IC_1, PARAM_ADDR_IC_1, PARAM_SIZE_IC_1, Param_Data_IC_1 );

SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, DM1_DATA_ADDR_IC_1, DM1_DATA_SIZE_IC_1, DM1_DATA_Data_IC_1 );

being _> DM1_DATA_Data_IC_1:

ADI_REG_TYPE DM1_DATA_Data_IC_1[DM1_DATA_SIZE_IC_1] = {

0x00, 0x00, 0x00, 0x00,

0x00, 0x00, 0x00, 0x00,

0x00, 0x00, 0x00, 0x00,

0x00, 0x00, 0x00, 0x00,

};

#define PROGRAM_SIZE_IC_1 10948

#define PROGRAM_ADDR_IC_1 49152

#define PARAM_SIZE_IC_1 59980

#define PARAM_ADDR_IC_1 0

#define DM1_DATA_SIZE_IC_1 16

#define DM1_DATA_ADDR_IC_1 45044

you said When you set it (3rd line), you overwrite part of your DM0 content.

Do you mean (3rd line) SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, DM1_DATA_ADDR_IC_1, DM1_DATA_SIZE_IC_1, DM1_DATA_Data_IC_1 );??

Why DM1 should overwrite DM0??

Is there any solution about this??

I want to use as much delay as I could with no SPI memory so far.