Adau1701 Phase Coherency DA to AD

Hello,

Internal delays produce this phase shift. Although the delays are mostly constant at a given sample rate, they cause a constantly increasing phase shift with frequency. For example, the delay between a TDM digital audio input to a TDM output is three samples. At 48 KHz this works out to a delay of T = 63 uS. The phase lag in degrees caused by this delay at input frequency f is equal to Phase = 360 x f x T -- this works out to 23 degrees at 1 KHz, and 46 degrees at 2 KHz.

A much larger delay, or latency, occurs between an analog ADC input and a DAC output. I could not find this delay listed in the current ADAU1701 data sheet, but I've seen it there previously -- it totals 52 samples at 48 KHz, or about 1.08 mS. At 500 Hz, this delay amounts to a phase shift of (360 x 500 Hz x .00108 s) = 194 degrees. At 2 KHz the phase shift quadruples. Internally these delays are caused by digital antialiasing and reconstruction filters within the Sigma-Delta ADC and DAC, respectively. These take the place of "brick wall" analog filters you would otherwise need to include before the ADC and after the DAC. The filters producing this latency may exhibit a somewhat variable delay with frequency, as filters generally do.

SigmaDSPs are primarily for audio applications, although they can find some use in instrumentation -- for example, see:

A Poor Engineer's Distortion Analyzer and Speaker Impedance Measurement

In audio playback a 1mS delay is insignificant. Even in live sound applications, it's equivalent to being only one extra foot away from a loudspeaker (because sound travels at roughly 1000 fps). However, latency of course matters in a test and measurement application. Fortunately, there's several methods to help cope with it:

Use a higher sample rate -- going to 96K, for example, cuts the delay at least in half. I seem to remember it does even better, because the filters mentioned above have less work to do at a higher sample rate -- thus they run faster.

Measure against a "control" or "reference" channel -- compare your DUT output to another signal that has traveled out through the same DAC and then in through another ADC. The idea is let the (hopefully) matching delays cancel.

Insert a compensating delay at an appropriate place in your signal path to achieve the same result. This may not work as accurately as a reference channel, but is worth a try if you can't spare an ADC for the reference.

Best regards,

Bob

Hi Bob,

Thanks you for your answer. It is exactly what you described. I will probably Move on to a shark Board or even An FPGA.

In order to do my distortion calculation ( cartesian loop ) i need a as Low as possible phase shift between the main and the measure channel. Compensatie this delay will limit the loops bandwidth to 1/delay in frequency terms.

I hoped to have found An El cheapo dsp solution. However i AM still amazed by the adau's processing capabilities.

Again, thanks for your Time and effort Bob!

Br

Evert

Thank you for your answer, it was quite helpful for me as well. As you mentioned, the latency is indeed 1.08ms at 48 kHz. However, in my case increasing the the sampling rate didn't improve this latency. Do you have an idea why ?