1701 PLL filter ... How to verify it's working?
Hi everybody, I've a problem with a set of boards using the 1701.
Due to design constraints we use a 24.576Mhz clock (an XO module), connected to the master clock input.Of course the PLL mode pins are both set to 1 so that we should get a 2X multiplier for the internal clock..
The board is running fine, but only runs if the 1701 "Program Length" is set at 2X (512 instructions) even if I'm running at 48 Khz.
Moreover an oscillator source set at 1Khz actually produces 500Hz at the outputs.
After much investigation I realized that probably the PLL is not working, and the chip instead of multiplying the external clock x 2 to generate the core clock it just uses the external one (so it runs at 24.576 Mhz instead of 49...). This is the only possible explaination for this behaviour.
If I set the program lenght to 1X everything stops, although the DSP is alive (I can read / write registers). If I set to 2X or 4X it works.
Now I checked everything several times. Clocks, dividers, GPIOs, power supplies ... everything is OK.
The only doubt that I have is that I cannout understand if the PLL is working. Checking pin PLL_LF with a scope I see it's at 3.3V. I don't know if I should see something on this pin, or if the scope is loading the circuit and actually stops the pll from working (but I don't hear any changes when connecting the probe even when the dsp is running at 2X).
Is there a way to understand if the PLL is working? What waveform should be present on that pin?
I'm sure that the PLL components are OK, and the board is working fine.
1701 pll
Hello Daniele,
Sorry for the delay in responding.
I am suspecting an issue with the master clock. Can you take a scope screenshot of the MCLK input as close to the MCLK pin of the 1701 as you can? I think there may be an issue with the waveform/reflections and this could cause missed clock edges or extra edges detected. The PLL would have a difficult time dealing with that.
At the PLL Loop Filter pin you should be seeing somewhere around 1.6V DC with not much of any waveform visible. Since you say it is sitting at 3.3V tells me that it is latched up or trying to lock to a frequency that is out of its range. The 24.576 is in its range but if it is detecting extra clock edges it will be out of its maximum of just under 28MHz.
The program length should still be set for 1X (1024) . If the clocks are running properly and you change it to 2X then the oscillator will be twice the frequency setting not half. So if setting it to 2X gives you half the frequency when it should be twice means it is running really slow, like 1/4X.
In addition to the scope plots can you also send over your schematics?
What I am going to look for is proper loop filter components, and then how the MCLK distribution is being done. I may also need to look at your PCB layout.
I will be off-line for several days due to the holidays. I will be checking the forum during our company holiday shutdown so I will be checking mid-week or so next week.
Thanks,
Dave T
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EZ Admin
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