Initialization sequence of ADAU1452
Thread Summary
The user inquired about the correct sequence for disabling and enabling the processor using the hibernate bit (0xF400) and CORE_START bit during initialization in SigmaStudio. The support engineer clarified that the SigmaStudio sequence includes additional steps to handle selfboot mode and recommended following the datasheet sequence (page 26) for faster boot times if selfboot is not used. The correct sequence is to set START_CORE first, then clear the HIBERNATE bit, with a delay of 1 sample period (20.8us @ 48kHz) or the block processing time (1.3ms for N=64) before un-hibernating.AI Generated Content
Dear support team,
I have a question about hibernate bit(0xF400 0bit) in initialization sequence.
In Datasheet P.26, "Recommended Program/Parameter loading Procedure" said that
"When writing large amounts of data to the program or parameter RAM in direct write mode,
use the hibernate register(Address 0xF400) to disable the processor."
In capture window, I think the sequence of disable the processor are below red line block :
And I think the sequence of enable the processor are below red line block:
At this enable sequence , I think that Hibernate bit should be clear before rising edge of START_CORE bit.
And current sequence of SigmaStudio is invalid , I think.
Because Hibernate bit enabling and CORE_START bit enabling are conflictive.
Could you tell me your opinion about it,please?
If sigmastudio's sequence is correct,
could you tell me delay time of "start delay" before clearing hibernate bit,please?
Best regards,
Takehiro Yabune
Audio Signal Processors
adau1452
adau145x
SigmaDSP Audio Processors
Hi Yabune-san,
Since the state of the processor is unknown when "Link Compile Download" is executed in SigmaStudio, the SigmaStudio initialization sequence must handle all scenarios and has some additional register writes.
The addition of "HIBERNATE" and "KILL_CORE" in the SigmaStudio handle the specific use case where the processor's SELFBOOT pin is high (meaning it is in selfboot mode). In this situation, after writing to the "SOFT_RESET" register, the processor will begin a selfboot and at the same time SigmaStudio is configuring registers and memory, the settings can get corrupted if selfboot and SigmaStudio are writing different data. To prevent this SigmaStudio waits for the selfboot to complete ("Reset Delay"), then it stops the DSP core (Hibernate + Kill_Core). Then it reprograms the registers and memory and restarts the DSP core.
If you do not have a use case that includes both selfboot and an external MCU or software that needs to overwrite the processor program, you do not need to include the Hibernate and Kill-Core registers. I would recommend you use the sequence from page 26 in the datasheet instead because the SigmaStudio sequence adds delay and increases boot time.
The recommended sequence for "un-hibernate" (setting HIBERNATE to zero) is to do this last, after the START_CORE is set. This is not a conflict. START_CORE starts the DSP core clock. Hibernate suspends core interrupts, essentially putting the DSP core in an idle state, Un-hibernate enables DSP audio frame interrupts. It's best to do it in this order, first start the core clocks, then start the audio interrupts after the core is started.
The hibernate delay time depends on your program, for sample based processing it is 1 sample period: e.g. delay=20.8us @ 48kHz. For block processing, it is the time required to process an entire block: e.g. N=64 delay=(64*20.8us)=1.3ms
Best regards,
John
Dear John-san,
Thank you for your reply.
I understood it deeply.
Thank you and best regards,
Takehiro Yabune
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