Trouble running the ADAU1701 at 192kHz
I know I have to be doing something wrong here, but I've looked at all the relevant documentation and searched the forum, but can't find what I've overlooked. I'm running Sigma 3.9, if that matters.
I've got the ADAU1701 MINIZ evaluation board hotrodded with an stick-on 49.152MHz oscillator running off the eval board's own 3.3V supply. The oscillator output is fed into the MCLK pin on J7. I have a simple project loaded and everything set for a 192kHz sampling frequency. The project compiles just fine, and the project actually runs perfectly at 48kHz (even with a 192kHz sampling rate 'propagated'), but when I switch over to the higher clock rate, all I get is white noise and heterodyne whistles out at max level. ReadBacks and meters on the schematic go nuts at the 192kHz rate too. The clock waveform going into Pin 32 of the 1701 looks good, snappier than built-in oscillator's, a full 3.3V p-p rectangular waveform. With the switch in the 48kHz position I see a 3V p-p sinewave from the internal oscillator at 12.288MHz. I put some series resistance in there to make sure the outboard oscillator wasn't violating the 1701s input somehow, but no change.
I did this same thing on the evaluation board for the ADAU144x, and that works like a champ. Where have I messed up?
Audio Signal Processors
SigmaDSP Audio Processors
adau1701
Hello Jim,
Actually an unmodified ADAU1701MINIZ happily runs at 192 K with its standard 12.288 MHz crystal. At any sample rate the core computes at 49.152 MHz (or 49.152 million instructions per second). Thus with a 48 K sample rate the core has time for (49,152 / 48) = 1024 instructions per sample. At higher sample rates the core can handle correspondingly fewer instructions before the next sample comes in. In all cases the core clock (thus MCLK and the PLL_MODE pins) remains the same.
Thus, all you have to do to set up your ADAU1701MINIZ to run at 192 K is the two settings inside SigmaStudio described at FAQ: How do I change the sample rate of my SigmaStudio system?
It's possible to use a 24.576 MHz MCLK if you also set the PLL for "512*fs" by tying both PLL_MODE pins (38 and 39) high. There's no valid setting for a 49 MHz MCLK.
I do remember someone on this forum who inadvertently (but successfully!) ran a -1701 at double clock speed by using a 24.576 MCLK with a PLL setting of 256*fs -- the usual setting for 12.288 MHz MCLK. This ran the core clock up to 98.3 MHz -- which would allow a full 1024 instructions at 96 K. Such overclocking is of course not recommended. BTW -- since the core clock's second harmonic is 98.3 MHz, you can tell if it's running by sniffing with a FM radio.
Best regards,
Bob
You're welcome! What the eval board sheet is trying to say, is that a different crystal (11.2896 MHz) is needed for 44.1 / 88.2 / 176.4 KHz sample rates. The standard 12.288 crystal is only good for 48 / 96 / 192 KHz.
Bob
No kidding? Well, I'll give that a try for sure. I saw that note on the eval board sheet that claimed the internal 12.288MHz crystal yielded a 48kHz sampling rate, and figured that an external clock at 256 times the desired sampling freq was a must. Hey, if this works, I owe you a brewskie! I'll report back tomorrow sometime; thanks a lot!
Well, I couldn't wait until tomorrow so I went out in the lab and gave your instructions a try. Sure enough, it works a treat. Everything is running at 192kHz and happy as a clam. I did have to remove the "single-pole output filter" (a 0.056uF cap across the output) to see everything I was generating, but it's all there and I'm jazzed. Thanks so much!
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