problem with setting the SDATA Mode to Master

Hi Dimitris,

The capture window does show the bit is set (after a compile-link-download) when I program the serial port as a master:

The default_download( ) function should replicate this download operation. I wonder if you are looking at the right file for the value? I see the "xx_IC1_REG.H" file has the register value cleared to 0x00. But when I look at the "xxx_IC1.H" file where the download function is defined, I see the register is set there with Bit 0 set:

/* Register Default - IC 1.Serial Port Control Registers */

#define R5_SERIAL_PORT_CONTROL_REGISTERS_IC_1_SIZE 2

ADI_REG_TYPE R5_SERIAL_PORT_CONTROL_REGISTERS_IC_1_Default[R5_SERIAL_PORT_CONTROL_REGISTERS_IC_1_SIZE] = {

0x01, 0x00

};

(...)

#define DEFAULT_DOWNLOAD_SIZE_IC_1 39

void default_download_IC_1() {
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SAMPLE_RATE_SETTING_IC_1_ADDR, REG_SAMPLE_RATE_SETTING_IC_1_BYTE, R0_SAMPLE_RATE_SETTING_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_DSP_RUN_REGISTER_IC_1_ADDR, REG_DSP_RUN_REGISTER_IC_1_BYTE, R1_DSP_RUN_REGISTER_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_CLKCTRLREGISTER_IC_1_ADDR, REG_CLKCTRLREGISTER_IC_1_BYTE, R2_CLKCTRLREGISTER_IC_1_Default );
SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_PLLCRLREGISTER_IC_1_ADDR, REG_PLLCRLREGISTER_IC_1_BYTE, R3_PLLCRLREGISTER_IC_1_Default );
SIGMA_WRITE_DELAY( DEVICE_ADDR_IC_1, R4_DELAY_IC_1_SIZE, R4_DELAY_IC_1_Default );

SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_SERIAL_PORT_CONTROL_0_IC_1_ADDR , R5_SERIAL_PORT_CONTROL_REGISTERS_IC_1_SIZE, R5_SERIAL_PORT_CONTROL_REGISTERS_IC_1_Default );

SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_ALC_CONTROL_0_IC_1_ADDR , R6_ALC_CONTROL_REGISTERS_IC_1_SIZE, R6_ALC_CONTROL_REGISTERS_IC_1_Default );

SIGMA_WRITE_REGISTER_BLOCK( DEVICE_ADDR_IC_1, REG_MICCTRLREGISTER_IC_1_ADDR,

When I play with the serial port control register bits, by setting serial port pulse mode, rising edge polarity on BCLK and LRCLK with master mode, I see the register value change in the exported files to what matches during download with a value of 0x39.

/* Register Default - IC 1.Serial Port Control Registers */

#define R5_SERIAL_PORT_CONTROL_REGISTERS_IC_1_SIZE 2

ADI_REG_TYPE R5_SERIAL_PORT_CONTROL_REGISTERS_IC_1_Default[R5_SERIAL_PORT_CONTROL_REGISTERS_IC_1_SIZE] = {

0x39, 0x00

};

So it looks to me the default_download( ) function uses the register values defined in the same source file.

-JT

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Thank you,
EZ Admin