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ADAU1701, setting the Serial port left-justified, the output data is rarely incorrect

SigmaDSP & SigmaStudio Paramecium May 21, 2014 00:00 2 replies Original on forum ↗
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Paramecium Question
May 21, 2014 00:00

Please let me ask you about ADAU1701.
If you know any solutions or information, would you please let me know ?

When setting the Serial data output left-justified,
there is a case that the only 1st bit of output data is not correct rarely.
Other bits are always correct.

When issuing RESET, writing application program and register by I2C
and checking the output wave form by multiple repetitions,
then the problem rarely occures, I found.

We had checked the data sheet, for example, followings aggain.
The system satisfies these specifications.

ADAU1701 data sheet (rev.B)
Page 8 DIGITAL TIMING SPECIFICATIONS
Page 10 INITIALIZATION

Audio Signal Processors

SigmaDSP Audio Processors

adau1701

Yagami Reply
Jun 1, 2014 00:00

Hello,

I haven't experienced this before, but I wonder if I can help. Could you provide the master clock frequency, PLL settings, and serial port clock settings?

Thanks!

EZAdministrator Reply
Aug 2, 2018 00:00

This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

Thank you,
EZ Admin