MCLKI and OUTPUT_LRCLK/BCLK synchronous?

Hi Bob,

that was my assumption, that the clocks are synchronous.

But in my opinion the description in the datasheet is not 100% clear.

The first paragraph says the clocks need to be synchronous - this could mean that you need an external clock master that feed MCLK, BCLK and LRCLK synchronous to the ADAU1701.

I was missing the statement like "an external master clock on MCLKI generates synchronous BCLK and LRCLK on I2S/TDM outputs if in master mode...".

Thanks

Christian

Hello Christian,

Triggering at the 1701's BCLK output (top), I obtained a stable MCLK trace at the crystal (bottom). Thus the two are synchronized.

The data sheet hints at this indirectly. Since any input I2S clocks must sync with MCLK (there's no sample rate converter), and since input from an external slave ADC is handled using the I2S output clocks, the output clocks must also be synchronous with MCLK.

Best regards,

Bob

just to add my $0.02 ...

Im also investigating ADAU1701 I2S with a CODEC. I plain to run the ADAU1701 as a slave. (short on IO)

12.288MHz OSC on the CODEC, it has a MCLK OUT which I will connect to the ADAU1701 MCLKI.

ADAU1701 CODEC

------------------ --------------

INPUT_BCLK --------------------- OUTPUT_BCLK

INPUT_LRCLK --------------------- OUTPUT_LRCLK

INPUT_MCLK ---------------------- OUTPUT_MCLK

If the ADAU1701 is the master, OUTPUT_BCLK/OUTPUT_LRCLK needs to be connected to ADAU1701 INPUT_BCLK/INPUT_LRCLK respectively. I am using all MP so slave was the way to go.

Hi,

ok, so my conclusion is that if I feed MCLKI then the generated BLCK and LRCLK signals are synchronous to the MCLKI signal (ADAU1701 is the I2S master).

Thanks!

Christian