About SRC in ADAU1442
Dear support team,
Could you tell me about SRC details below ,please?
1.Lock time of SRC from enabling SRC.
2.Ouput delay time of SRC from enabling SRC.
Lock time + Group delay?
3.Behavior of SRC when SRC ratio is changed.
Detail of fade-out and fade-in function?
Detail of mute time?
taking time of detect of ratio changing?
Best regards,
Takepiro
Audio Signal Processors
src
adau1442
SigmaDSP Audio Processors
1. The lock time of the SRC depends on the input rate and the output rate, and the stability of the clocks. The best way to verify if the ASRC has locked is to read the ASRC lock bits.
2. Yes, the output delay is the lock time + group delay. You can calculate the group delay based on the formula in the datasheet. The lock time, however, is variable, and cannot be easily calculated.
3. If the ratio is changed while the ASRC is running, the ASRC will gradually change from one sample rate to the other. It will not mute unless lock is lost, but in most cases, if the sample rate suddenly changes, lock will not be lost. The amount of time it takes to change from one sample rate to another is variable and cannot be easily calculated. However, this situation will cause an audible artifact. Therefore, it is best to mute the ASRC manually before the sample rate changes and then un-mute the ASRC after the sample rate has been changed.
Dear Brett-san,
Thank you for your supports.
About SRC lock time and sampling rate changing time,
Could you provide formula of them,please?
Or, Could you provide max time of them,please?
Best regards,
Takepiro
Unfortunately the lock time or sample rate changing time of the ASRCs has not been characterized when these devices were designed, and therefore this information is not available.
Therefore, the only way to know if the ASRCs have achieved lock is to check the ASRC lock status bits by reading the corresponding registers.
Dear Yagami-san,
Thank you for your reply.
I understood it.
Best regards,
Takepiro
Please log in to reply.