Aliases between hierarchy boards?
I'd like to simplify my project and reduce processing load by using a single DC source for (each of) logic high and logic low. It would seem a simple thing to create an alias 'send' from each DC source, and paste copies of the alias 'receive' wherever needed. However, I can't seem to paste an alias receive into a different hierarchy board than its associated send. Likewise, if the send is on the main page, I can't paste the recieve into a hierarchy board. Is this by design? I've observed this in both 3.8 and 3.9 beta. I s'pose I could create additional inputs to each hierarchy board that needs these logic levels and keep all the aliases on the main page, but that adds to the clutter... Thoughts? Thanks!
Hello,
Hierarchy boards, as you noticed, do require explicit interconnects. It's been that way for version 3.x all the way to 3.10, so we can safely assume it's by design. Compared to the way schematic programs work generally it may appear a bit strange, especially for often-used nodes such as "Ground." In fact, a GND symbol has been a favorite feature request in the forum.
Although a SIgmaStudio signal flow appears as a schematic, it's really source code that's compiled to the chip's machine code. Thus, every wire between blocks allocates a spot in data memory. We can view the hierarchy boards as reusable code (see https://ez.analog.com/message/52938#52938), and their pins as parameters passing through. In effect, the hierarchy-board construct forces a kind of structured programming in which all its variables in and out are explicitly declared. This can be advantageous, especially when re-using hierarchy blocks you may have created months ago. Perhaps this helps explain why this arrangement is in place.
You can still unclutter your signal flow by attaching an alias to each hierarchy pin both inside and outside, as shown below:
Best regards,
Bob
Hi all:
As Bob mentions here, alias cannot currently be shared between boards and his points are all correct however to clarify on explicitly the use of Aliases, T connections and Boards inputs and ouputs, called "System Cells" do not carry any penalty for generating code. In other words, the use of those are transparent to core.
We can make a case of creating cross tab aliases, however this will somewhat defeat the purpose of board inputs and boards outputs and will make graphical signal flows more difficult to understand however any ideas for improvements like this will be taken into account.
Thanks a lot
Miguel
Hi Miguel,
Thanks for the clarification. I would like to see a GND () symbol in SigmaStudio. As I envision this, it would work like a zero DC source available anywhere in a signal flow. Internally only the first one would use any instructions. Since zero is zero everywhere and in any number format, GND symbols within hierarchy boards would not cause the confusion you noted.
Best regards,
Bob
Thanks Bob, Miguel. It makes sense that if a hierarchy board is to be self-contained and re-usable, it cannot include an alias that may or may not exist in a new project. Adding additional hierarchy board inputs connected to aliases on the main page isn't so bad, I went ahead and did so anyway.
Still, I love the idea of a ground symbol. I'd add that a similar symbol to refer to logic high (Vcc or otherwise) could be useful as well (though number format concerns become an issue with '1' as opposed to '0')
Cheers,
Peter
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