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ADAU1707 Self-boot mode, what abou RESET pin?

SigmaDSP & SigmaStudio MCastany Oct 25, 2013 00:00 4 replies Original on forum ↗
Thread Summary

Thread Summary

The user wants the ADAU1701 to operate in self-boot mode with the WP pin HIGH. The final answer suggests using an RC filter (10 kOhm + 1 uF) on the RESET pin to ensure it goes high after power-up. The accompanying answers clarify that the RESET pin should not be left unconnected and that the WB pin should be connected to GND in normal operation.
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MCastany Question
Oct 25, 2013 00:00

Hello,

I want the ADAU1701 to operate in self-boot mode, so when it initializes loads the data from the EEPROM, with WP pin HIGH.

Here's my problem: I don't know what to do with RESET pin. I't cannot be set to 3.3V, and my question is: what about if I left this pin unconnected?

I will never use the reset function, as the EEPROM can keep the data about 100 years, and the programming test to obtain the optimum DSP configuration will be done with the evaluation board. In other words, the EEPROM will only be burned once in the final product.

Thank you,

Marti.

Audio Signal Processors

SigmaDSP Audio Processors

adau1701

ADIApproved Reply
Oct 25, 2013 00:00

Hello Marti,

The state of the RESET pin must be determined in the design. You can't leave that pin floating. Tie it to IOVDD so that it will essentially trigger a selfboot when the system is powered up.

Best Regards,

Brett

ADIApproved Reply
Oct 25, 2013 00:00

Hi Marti,

An even better solution might be to put an RC filter on the RESET pin so that it goes to logic high slightly after the rest of the device has powered up. A 10 kOhm + 1 uF creates a delay in the tens of milliseconds, which is sufficient.

MCastany Reply
Oct 27, 2013 00:00

Hi Brett,

I've implemented the RC filter. It reaches 3V in about 25ms.

I have another question: the WB pin, in normal operation (no wirteback), has to be connected to GND?

Thank you!

ADIApproved Reply
Oct 31, 2013 00:00

Pin 20 ADDR1/CDATA/WB should be connected directly to GND.

Pin 21 CLATCH/WP should be pulled to IOVDD with a 10k resistor.