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First value read by ADC can vary from chip to chip?

SigmaDSP & SigmaStudio J3627 Jul 23, 2013 00:00 4 replies Original on forum ↗
Thread Summary

Thread Summary

The user encountered an issue with an Aux ADC on one of seven ADAU1702 prototypes, where the minimum value was held lower than expected after boot. The solution involved using a timer to feed a fake value to the hold block for the first few milliseconds, which resolved the problem. The cause of the initial incorrect value remains unclear, but it may be related to uninitialized memory at boot time.
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J3627 Question
Jul 23, 2013 00:00

I'm reading an Aux ADC and then holding the minimum value with a slow release time. This has only been a problem on 1 out of 7 prototypes, but on that one, the value is held much lower than it should be. If I reset the DSP, it then behaves normally. So I thought it might be because the ADC voltage doesn't settle before the DSP turns on, but I've tried increasing the time for the DSP RESET pin to orders of magnitude longer than the ADC pin voltage takes to settle, but it still doesn't help. So maybe the first value read by the ADC is wrong? Any ideas on how to work around this? Feed the hold block a fake value for the first few milliseconds after boot or something? It's a self-boot ADAU1702.

Audio Signal Processors

adau1702

adc

aux_adc

SigmaDSP Audio Processors

self-boot

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ADIApproved Reply
Jul 24, 2013 00:00

This is pretty odd! I'm not sure what could cause the problem. I can say that the state of the memory at boot time is basically "unknown". So, your suggested workaround of feeding a fake value might work. I think this could be accomplished with a timer that would control a switch that feeds the hold block. The switch would start in a position where you could feed in the fake value for a short time, and after the time runs out, you could flip the switch and change to the real value. Does that make sense?

I am currently working from home and I don't have SigmaStudio installed on this computer so I can't create an example signal flow, but hopefully you can understand what I was trying to describe.

J3627 Reply
Jul 24, 2013 00:00

Yes, that's what I did and it works. I already had a mute triggered by a delay, so I had the same timer control the fake value switch, and as it comes out of mute, it also starts to read the real values. I don't know why the initial value is lower than expected on only 1 sample out of 7, but I'll watch for this in the future.

ADIApproved Reply
Jul 24, 2013 00:00

Thanks for confirming. I do not know what the root cause might be, other than the fact that the delay memory isn't really initialized when the chip powers on. Perhaps the Aux ADC only updates the data RAM when its input changes? Still, that doesn't explain the 1-in-7 occurrence rate you're seeing.

Please post an update to this thread if you have additional information in the future!

Brett

EZAdministrator Reply
Aug 2, 2018 00:00

This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.

Thank you,
EZ Admin