Start Pulse
Another discussion indicated that the Start Pulse in a Sigma DSP is not a one time event but instead occurs every frame. I had previously thought that the start pulse was a one time event. The discussion stated, "The program counter will jump to the start of the program when it finishes processing a frame and then wait for the next audio sample to arrive. It will start processing once the next edge of the start pulse clock comes".
I'm not clear on the interaction between the generation of the start pulses and incoming frames (LRCLK). Suppose In a two Sigma DSP system one DSP generates master LRCLK and BCLK signals. The second DSP serial ports are set to be slaves to these clock signals. Both DSPs are driven from the same CLIK in signal. If the second (slave) DSP uses an internally generated start pulse please discuss the possible relationship(s) of the start pulse, incoming frame, and the processing of that frame.
Thanks
Hi db10,
For 3rd generation SigmaDSPs (the ADAU144x, for example), the start pulse is indeed occurring every frame. It is basically an interrupt pulse that tells the DSP to start processing the next audio sample. This pulse can either come from a serial port (when the serial port indicates that new data is ready) or from the internal clock generator.
In the 2 DSP system you described, you could have the first DSP take its start pulse from the internally generated clock generator and then have the second DSP take its start pulse from the serial input ports (which are slaves to the first DSP). This means that when a new sample arrives at the second DSP's serial port, it will then begin processing that sample.
You could also have the 2nd DSP use its internal clock generator as the start pulse source. On the surface, it might appear like this would cause problems due to jitter in the system, but the SigmaDSP also has built-in "de-jitter" circuits that resolve any possible clock edge overlap and solve the problem.
So, the simple rule of thumb is that if both DSPs are clocked from the same master clock signal, you can use the internal clock generators for the start pulse and the de-jitter circuits will handle the rest.
The set up you describe above, in which each Sigma is set to generate its won internally generated start pulse is one I've typically used. I have had no problems.However, I was concerned that the Sigma slave device might have its core running in a domain different that that of the master and that I was leaving myself open to some data synchronization problems.
Hi db10,
Even if the core clock is running in a different domain, it is at a significantly higher frequency (172 MHz in the case of the ADAU144x) than the audio sample rate (48 kHz, typically). As long as all of your DSP instructions execute within the span of a single frame, reliably, over the full range of jitter, then there will be no data synchronization issues when you use a different start pulse for the core and preferably have the serial ports acting as slaves to the external clock source.
This question has been assumed as answered either offline via email or with a multi-part answer. This question has now been closed out. If you have an inquiry related to this topic please post a new question in the applicable product forum.
Thank you,
EZ Admin
Please log in to reply.