SPDIF on ADAU1442

guytaar Question

Oct 26, 2012 00:00

Hi al,

I'm running into a very annoying problem, it's quiet urgent, the product is in a rather final phase... . I've just received a first batch of a new product with a ADAU1442 on board. On all devices, the SPDIF in and out does not work! The PCB are exactly the same as the prototype (which does work) and the software is also exactly the same. All other inputs and outputs (through ADCs and DACs) are working correct, only SPDIF doesn't. I've checked the settings again and again and they all appear correct. The SPDIF input signal goes through the FARM and this does nothing at all. When I route some signal from an ADC input to the SPDIF output, this signal is routed there but it sound very "crackled". The AP ATS-2 is not able to sync on the signal. With an RME sound card, I can make it work (by selecting internal 44.1 kHz clock first and when it syncs, switch back to SPDIF in clock). When I unplug the cable and plug back in, the "crackled" sound is back. Does anybody seen this before or has info or suggestions what to do or test? Thanks in advance!

Best regards,

Guy

Audio Signal Processors

adau1442

SigmaDSP Audio Processors

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guytaar Reply

Oct 29, 2012 00:00

Hi again,

I have an update on this issue; we've noticed that on the old devices, the xtal frequency and the CLKOUT is the running nicely together. On the new devices, the two clock signals are the same but they shift, I assume the CLKOUT isn't stable. What can be the reason for this? Could a wrong value of the external components in the PLL be the reason? Is there any other possible reason? Thanks a lot for your advice or hints!

Best regards,

Guy

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GatsbyDSP Reply

Oct 30, 2012 00:00

Depending on how long ago you made your prototype it might be worth comparing the earlier rev.0 datasheet to see what changes have been made to the SPDIF functionality. The current datasheet is rev.C.

This reports an anomoly regarding the SPDIF port. Thought it might be worth bringing to your attention.

http://www.analog.com/static/imported-files/data_sheets/ADAU1442_1445_1446_Anomaly.pdf

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guytaar Reply

Nov 7, 2012 00:00

Thanks for the info, in this case, it was not the problem but at least I know we can expect a problem with this sooner or later ...

The problem here was the value in the PLL circuit, one cap was 33pF instead of 33nF. The same mistake was on the prototype boards but for some reason (murphy?) all the prototype boards worked and none of the production. Anyway, it's being solved now. I just wanted to share!